diff options
| author | Kalesh AP <kalesh.purayil@emulex.com> | 2014-05-30 19:06:26 +0530 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2014-05-30 17:27:33 -0700 |
| commit | 4c60005fe792255cb785c16019e8e0391a931b48 (patch) | |
| tree | cd73ac01cc5ca52bc987642c9b32fcf5c3a98470 /drivers/net/ethernet/emulex/benet/be_cmds.h | |
| parent | 96c9b2e45e0f6bb5889cdc11805d00b364f00158 (diff) | |
be2net: re-factor MCCQ error status handling code
This patch improves MCCQ error status handling in the following ways:
a) A MCC cmd completion returns a base-status and an addl-status.
So far, the routine be_mcc_compl_process() returned only the "status" value.
Now, embedd both statuses in the return value and let the caller routine access
the value of interest using base_status() and addl_status() macros.
b) Rename variables accordingly (base/addl) to avoid confusion while error
checking.
b) Some of the errors returned by FW are harmless and so an error msg is not
logged for such errors. Capture this logic in a separate routine to make the
code more readable.
Signed-off-by: Kalesh AP <kalesh.purayil@emulex.com>
Signed-off-by: Sathya Perla <sathya.perla@emulex.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/emulex/benet/be_cmds.h')
| -rw-r--r-- | drivers/net/ethernet/emulex/benet/be_cmds.h | 30 |
1 files changed, 21 insertions, 9 deletions
diff --git a/drivers/net/ethernet/emulex/benet/be_cmds.h b/drivers/net/ethernet/emulex/benet/be_cmds.h index 070f7757cbe7..af624039c0a8 100644 --- a/drivers/net/ethernet/emulex/benet/be_cmds.h +++ b/drivers/net/ethernet/emulex/benet/be_cmds.h @@ -50,7 +50,7 @@ struct be_mcc_wrb { #define CQE_FLAGS_CONSUMED_MASK (1 << 27) /* Completion Status */ -enum { +enum mcc_base_status { MCC_STATUS_SUCCESS = 0, MCC_STATUS_FAILED = 1, MCC_STATUS_ILLEGAL_REQUEST = 2, @@ -60,13 +60,25 @@ enum { MCC_STATUS_NOT_SUPPORTED = 66 }; -#define MCC_ADDL_STS_INSUFFICIENT_RESOURCES 0x16 -#define MCC_ADDL_STS_FLASH_IMAGE_CRC_MISMATCH 0x4d +/* Additional status */ +enum mcc_addl_status { + MCC_ADDL_STATUS_INSUFFICIENT_RESOURCES = 0x16, + MCC_ADDL_STATUS_FLASH_IMAGE_CRC_MISMATCH = 0x4d, + MCC_ADDL_STATUS_TOO_MANY_INTERFACES = 0x4a +}; + +#define CQE_BASE_STATUS_MASK 0xFFFF +#define CQE_BASE_STATUS_SHIFT 0 /* bits 0 - 15 */ +#define CQE_ADDL_STATUS_MASK 0xFF +#define CQE_ADDL_STATUS_SHIFT 16 /* bits 16 - 31 */ -#define CQE_STATUS_COMPL_MASK 0xFFFF -#define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */ -#define CQE_STATUS_EXTD_MASK 0xFFFF -#define CQE_STATUS_EXTD_SHIFT 16 /* bits 16 - 31 */ +#define base_status(status) \ + ((enum mcc_base_status) \ + (status > 0 ? (status & CQE_BASE_STATUS_MASK) : 0)) +#define addl_status(status) \ + ((enum mcc_addl_status) \ + (status > 0 ? (status >> CQE_ADDL_STATUS_SHIFT) & \ + CQE_ADDL_STATUS_MASK : 0)) struct be_mcc_compl { u32 status; /* dword 0 */ @@ -259,8 +271,8 @@ struct be_cmd_resp_hdr { u8 opcode; /* dword 0 */ u8 subsystem; /* dword 0 */ u8 rsvd[2]; /* dword 0 */ - u8 status; /* dword 1 */ - u8 add_status; /* dword 1 */ + u8 base_status; /* dword 1 */ + u8 addl_status; /* dword 1 */ u8 rsvd1[2]; /* dword 1 */ u32 response_length; /* dword 2 */ u32 actual_resp_len; /* dword 3 */ |