diff options
author | Claudiu Manoil <claudiu.manoil@nxp.com> | 2019-08-01 14:52:51 +0300 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2019-08-02 18:22:18 -0700 |
commit | 231ece36f50df5d0d648011c58d4255d112a8bbf (patch) | |
tree | 707edd0211ede4ebfb4b68ba2debd147e9f4dcce /drivers/net/ethernet/freescale/enetc/enetc_mdio.c | |
parent | 0c010a9deb33179169fa867d3c76833ce80165b7 (diff) |
enetc: Add mdio bus driver for the PCIe MDIO endpoint
ENETC ports can manage the MDIO bus via local register
interface. However there's also a centralized way
to manage the MDIO bus, via the MDIO PCIe endpoint
device integrated by the same root complex that also
integrates the ENETC ports (eth controllers).
Depending on board design and use case, centralized
access to MDIO may be better than using local ENETC
port registers. For instance, on the LS1028A QDS board
where MDIO muxing is required. Also, the LS1028A on-chip
switch doesn't have a local MDIO register interface.
The current patch registers the above PCIe endpoint as a
separate MDIO bus and provides a driver for it by re-using
the code used for local MDIO access. It also allows the
ENETC port PHYs to be managed by this driver if the local
"mdio" node is missing from the ENETC port node.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/freescale/enetc/enetc_mdio.c')
-rw-r--r-- | drivers/net/ethernet/freescale/enetc/enetc_mdio.c | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/drivers/net/ethernet/freescale/enetc/enetc_mdio.c b/drivers/net/ethernet/freescale/enetc/enetc_mdio.c index 05094601ece8..149883c8f0b8 100644 --- a/drivers/net/ethernet/freescale/enetc/enetc_mdio.c +++ b/drivers/net/ethernet/freescale/enetc/enetc_mdio.c @@ -6,7 +6,7 @@ #include <linux/iopoll.h> #include <linux/of.h> -#include "enetc_pf.h" +#include "enetc_mdio.h" #define ENETC_MDIO_REG_OFFSET 0x1c00 #define ENETC_MDIO_CFG 0x0 /* MDIO configuration and status */ @@ -20,10 +20,6 @@ enetc_port_wr(hw, ENETC_##off + ENETC_MDIO_REG_OFFSET, val) #define enetc_mdio_rd_reg(off) enetc_mdio_rd(hw, off) -struct enetc_mdio_priv { - struct enetc_hw *hw; -}; - #define ENETC_MDC_DIV 258 #define MDIO_CFG_CLKDIV(x) ((((x) >> 1) & 0xff) << 8) @@ -47,8 +43,7 @@ static int enetc_mdio_wait_complete(struct enetc_hw *hw) !(val & MDIO_CFG_BSY), 10, 10 * TIMEOUT); } -static int enetc_mdio_write(struct mii_bus *bus, int phy_id, int regnum, - u16 value) +int enetc_mdio_write(struct mii_bus *bus, int phy_id, int regnum, u16 value) { struct enetc_mdio_priv *mdio_priv = bus->priv; struct enetc_hw *hw = mdio_priv->hw; @@ -95,7 +90,7 @@ static int enetc_mdio_write(struct mii_bus *bus, int phy_id, int regnum, return 0; } -static int enetc_mdio_read(struct mii_bus *bus, int phy_id, int regnum) +int enetc_mdio_read(struct mii_bus *bus, int phy_id, int regnum) { struct enetc_mdio_priv *mdio_priv = bus->priv; struct enetc_hw *hw = mdio_priv->hw; |