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authorBrett Creeley <brett.creeley@intel.com>2020-02-13 13:31:18 -0800
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2020-02-19 13:01:51 -0800
commit36be2baa09f04619b689adb1dac84c8727c407dc (patch)
tree321ba08402215a47ca09f2d31584e98fbd271019 /drivers/net/ethernet/intel/ice/ice_hw_autogen.h
parenta6892c96fc4908f43b6bfbc0a72f416500254f76 (diff)
ice: Always clear the QRXFLXP_CNTXT register for VF Rx queues
Currently when the PF reduces its number of channels via ethtool and then VFs are created there may be stale data for some of the Rx queues belonging to VFs. This happens when a VF reuses an Rx queue that was previously used by the PF. Specifically, the QRXFLXP_CNTXT register will have incorrect values. Fix this by always clearing the relevant values in the QRXFLXP_CNTXT register for VF queues. Signed-off-by: Brett Creeley <brett.creeley@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ice/ice_hw_autogen.h')
-rw-r--r--drivers/net/ethernet/intel/ice/ice_hw_autogen.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h
index 43e4efbccd8e..1d37a9f02c1c 100644
--- a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h
+++ b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h
@@ -85,6 +85,7 @@
#define QRXFLXP_CNTXT_RXDID_IDX_M ICE_M(0x3F, 0)
#define QRXFLXP_CNTXT_RXDID_PRIO_S 8
#define QRXFLXP_CNTXT_RXDID_PRIO_M ICE_M(0x7, 8)
+#define QRXFLXP_CNTXT_TS_M BIT(11)
#define GLGEN_RSTAT 0x000B8188
#define GLGEN_RSTAT_DEVSTATE_M ICE_M(0x3, 0)
#define GLGEN_RSTCTL 0x000B8180