diff options
| author | Sasha Neftin <sasha.neftin@intel.com> | 2020-06-02 10:50:47 +0300 |
|---|---|---|
| committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2020-06-29 18:21:09 -0700 |
| commit | 707abf0695481ad19b0b74af65f30c71123d6154 (patch) | |
| tree | b97226e58ca75d8c5a3a5bf7b8f48bf936766554 /drivers/net/ethernet/intel/igc/igc_mac.c | |
| parent | 93ec439abeefe2e205657ae2b98a7fee4fbd4a0b (diff) | |
igc: Add initial LTR support
The LTR message on the PCIe inform the requested latency
on which the PCIe must become active to the downstream
PCIe port of the system.
This patch provide recommended LTR parameters by i225
specification.
Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/igc/igc_mac.c')
| -rw-r--r-- | drivers/net/ethernet/intel/igc/igc_mac.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/igc/igc_mac.c b/drivers/net/ethernet/intel/igc/igc_mac.c index 410aeb01de5c..bc077f230f17 100644 --- a/drivers/net/ethernet/intel/igc/igc_mac.c +++ b/drivers/net/ethernet/intel/igc/igc_mac.c @@ -417,6 +417,11 @@ s32 igc_check_for_copper_link(struct igc_hw *hw) hw_dbg("Error configuring flow control\n"); out: + /* Now that we are aware of our link settings, we can set the LTR + * thresholds. + */ + ret_val = igc_set_ltr_i225(hw, link); + return ret_val; } |