summaryrefslogtreecommitdiff
path: root/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
diff options
context:
space:
mode:
authorDavid S. Miller <davem@davemloft.net>2018-05-17 17:02:57 -0400
committerDavid S. Miller <davem@davemloft.net>2018-05-17 17:02:57 -0400
commit56a9a9e73783dcf48fa1bcbec56c643c36648eb6 (patch)
tree8273aa1315ad7860882e6eeb41876de80ce09b29 /drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
parent7c5995b33d6e40316d366205a7926d122c5366a7 (diff)
parent43c89b16427f97607cdc9a64fe2a84935568af64 (diff)
Merge branch '10GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue
Jeff Kirsher says: ==================== 10GbE Intel Wired LAN Driver Updates 2018-05-17 This series contains updates to ixgbe, ixgbevf and ice drivers. Cathy Zhou resolves sparse warnings by using the force attribute. Mauro S M Rodrigues fixes a bug where IRQs were not freed if a PCI error recovery system opts to remove the device which causes ixgbe_io_error_detected() to return PCI_ERS_RESULT_DISCONNECT before calling ixgbe_close_suspend() which results in IRQs not freed and crashing when the remove handler calls pci_disable_device(). Resolved this by calling ixgbe_close_suspend() before evaluating the PCI channel state. Pavel Tatashin releases the rtnl_lock during the call to ixgbe_close_suspend() to allow scaling if device_shutdown() is multi-threaded. Emil modifies ixgbe to not validate the MAC address during a reset, unless the MAC was set on the host so that the VF will get a new MAC address every time it reloads. Also updates ixgbevf to set hw->mac.perm_addr in order to retain the custom MAC on a reset. Anirudh updates the ice NVM read/erase/update AQ commands to align with the latest specification. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c')
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c13
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
index 42f63b943ea0..1e49716f52bc 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
@@ -1436,7 +1436,8 @@ void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input,
{
u32 hi_hash_dword, lo_hash_dword, flow_vm_vlan;
- u32 bucket_hash = 0, hi_dword = 0;
+ u32 bucket_hash = 0;
+ __be32 hi_dword = 0;
int i;
/* Apply masks to input data */
@@ -1475,7 +1476,7 @@ void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input,
* Limit hash to 13 bits since max bucket count is 8K.
* Store result at the end of the input stream.
*/
- input->formatted.bkt_hash = bucket_hash & 0x1FFF;
+ input->formatted.bkt_hash = (__force __be16)(bucket_hash & 0x1FFF);
}
/**
@@ -1584,7 +1585,7 @@ s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw,
return IXGBE_ERR_CONFIG;
}
- switch (input_mask->formatted.flex_bytes & 0xFFFF) {
+ switch ((__force u16)input_mask->formatted.flex_bytes & 0xFFFF) {
case 0x0000:
/* Mask Flex Bytes */
fdirm |= IXGBE_FDIRM_FLEX;
@@ -1654,13 +1655,13 @@ s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw,
IXGBE_WRITE_REG(hw, IXGBE_FDIRPORT, fdirport);
/* record vlan (little-endian) and flex_bytes(big-endian) */
- fdirvlan = IXGBE_STORE_AS_BE16(input->formatted.flex_bytes);
+ fdirvlan = IXGBE_STORE_AS_BE16((__force u16)input->formatted.flex_bytes);
fdirvlan <<= IXGBE_FDIRVLAN_FLEX_SHIFT;
fdirvlan |= ntohs(input->formatted.vlan_id);
IXGBE_WRITE_REG(hw, IXGBE_FDIRVLAN, fdirvlan);
/* configure FDIRHASH register */
- fdirhash = input->formatted.bkt_hash;
+ fdirhash = (__force u32)input->formatted.bkt_hash;
fdirhash |= soft_id << IXGBE_FDIRHASH_SIG_SW_INDEX_SHIFT;
IXGBE_WRITE_REG(hw, IXGBE_FDIRHASH, fdirhash);
@@ -1698,7 +1699,7 @@ s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw,
s32 err;
/* configure FDIRHASH register */
- fdirhash = input->formatted.bkt_hash;
+ fdirhash = (__force u32)input->formatted.bkt_hash;
fdirhash |= soft_id << IXGBE_FDIRHASH_SIG_SW_INDEX_SHIFT;
IXGBE_WRITE_REG(hw, IXGBE_FDIRHASH, fdirhash);