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author | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2022-01-18 10:18:55 +0000 |
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committer | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2022-01-18 10:18:55 +0000 |
commit | 51efd61e20a08e1a262c3b8b6219600ebca2006c (patch) | |
tree | 887b7604bffd071d5a07640040cc8c9d7f7b09a6 /drivers/net/ethernet/marvell/mvgmac.h | |
parent | 956c86b60ce352b3e195c6f0700a07176989d356 (diff) | |
parent | e2365fc3e4a0e134ee7f875ce71f0abaaeb4552d (diff) |
Merge branches 'mvebu-cpuidle' and 'mvneta' into clearfog
Diffstat (limited to 'drivers/net/ethernet/marvell/mvgmac.h')
-rw-r--r-- | drivers/net/ethernet/marvell/mvgmac.h | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/drivers/net/ethernet/marvell/mvgmac.h b/drivers/net/ethernet/marvell/mvgmac.h new file mode 100644 index 000000000000..36ed203094be --- /dev/null +++ b/drivers/net/ethernet/marvell/mvgmac.h @@ -0,0 +1,56 @@ +#ifndef MVGMAC_H +#define MVGMAC_H + +#include <linux/phylink.h> + +/* The two bytes Marvell header. Either contains a special value used by + * Marvell switches when a specific hardware mode is enabled (not supported + * by this driver) or is filled automatically by zeroes on the RX side. + * Those two bytes being at the front of the Ethernet header, they allow + * to have the IP header aligned on a 4 bytes boundary automatically: the + * hardware skips those two bytes on its own. + */ +#define MARVELL_HEADER_SIZE 2 + +enum { + /* GMAC version */ + MVGMAC_NETA, + MVGMAC_PP21, + MVGMAC_PP22, +}; + +struct mvgmac { + void __iomem *base; + unsigned int version; + struct phylink_pcs pcs; +}; + +static inline struct mvgmac *pcs_to_mvgmac(struct phylink_pcs *pcs) +{ + return container_of(pcs, struct mvgmac, pcs); +} + +void mvgmac_set_max_rx_size(struct mvgmac *gmac, size_t max_rx_size); +void mvgmac_port_enable(struct mvgmac *gmac); +void mvgmac_port_disable(struct mvgmac *gmac); +int mvgmac_configure(struct mvgmac *gmac, phy_interface_t phy_mode); +void mvgmac_link_unforce(struct mvgmac *gmac); +void mvgmac_link_force_down(struct mvgmac *gmac); +void mvgmac_link_down(struct mvgmac *gmac, int mode); +void mvgmac_link_up(struct mvgmac *gmac, int mode, int speed, int duplex, + bool tx_pause, bool rx_pause); +bool mvgmac_link_is_up(struct mvgmac *gmac); +void mvgmac_pcs_get_state(struct phylink_pcs *pcs, + struct phylink_link_state *state); +void mvgmac_pcs_an_restart(struct phylink_pcs *pcs); +int mvgmac_pcs_config(struct phylink_pcs *pcs, unsigned int mode, + phy_interface_t interface, + const unsigned long *advertising, + bool permit_pause_to_mac); +void mvgmac_config_mac(struct mvgmac *gmac, unsigned int mode, + const struct phylink_link_state *state); + +void mvgmac_set_lpi_ts(struct mvgmac *gmac, unsigned int ts); +void mvgmac_set_eee(struct mvgmac *gmac, bool enable); + +#endif |