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authorMaxime Chevallier <maxime.chevallier@bootlin.com>2018-06-28 14:42:05 +0200
committerDavid S. Miller <davem@davemloft.net>2018-06-30 18:54:09 +0900
commitbd43d1ba12b71bda33bac82cff623bb8fa19b953 (patch)
tree6e2c5757839f8fff09d16bf704a5aaf52b80cd5f /drivers/net/ethernet/marvell/mvpp2/mvpp2.h
parent7b9c7d7dc539308e4b08974ebeba9cc1f685320b (diff)
net: mvpp2: prs: Drop unions representing TCAM and SRAM entries
PPv2's Header Parser use some large TCAM and SRAM entries, that are duplicated in software so that we can write them to hardware only when we are done modifying them. Currently, PPv2 uses a union containing arrays of u32 and u8 to represent these entries, to facilitate byte per byte access. This representation is broken when we want to support big endian, and this makes the code confusing to read. This patch drops the union, and simply stores the TCAM and SRAM entries as u32 arrays, each entry corresponding to a 32-bit register. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/marvell/mvpp2/mvpp2.h')
-rw-r--r--drivers/net/ethernet/marvell/mvpp2/mvpp2.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
index fa314b272853..81a66cce7fa8 100644
--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
+++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
@@ -553,6 +553,8 @@
((total_size) - NET_SKB_PAD - MVPP2_SKB_SHINFO_SIZE)
#define MVPP2_BIT_TO_BYTE(bit) ((bit) / 8)
+#define MVPP2_BIT_TO_WORD(bit) ((bit) / 32)
+#define MVPP2_BIT_IN_WORD(bit) ((bit) % 32)
/* IPv6 max L3 address size */
#define MVPP2_MAX_L3_ADDR_SIZE 16