diff options
| author | Maxime Chevallier <maxime.chevallier@bootlin.com> | 2019-03-27 09:44:20 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2019-03-27 11:10:58 -0700 |
| commit | 8d2847d9462d82a822898f7afcb46f080f8dc392 (patch) | |
| tree | f5cc4ccc3efc4fe590884e836f56b26cb0ab91f8 /drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c | |
| parent | ff2f3cb6eb899c13dbc039f7c3e7b274c37cdc18 (diff) | |
net: mvpp2: cls: Invalidate all C2 entries except the ones we use
C2 TCAM entries can be invalidated to avoid unwanted matches. Make sure
all entries are invalidated at init, then validate only the ones we use.
Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c')
| -rw-r--r-- | drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c index 482de582f994..7a889a925714 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c @@ -489,8 +489,16 @@ static void mvpp2_cls_flow_lkp_init(struct mvpp2 *priv, static void mvpp2_cls_c2_write(struct mvpp2 *priv, struct mvpp2_cls_c2_entry *c2) { + u32 val; mvpp2_write(priv, MVPP22_CLS_C2_TCAM_IDX, c2->index); + val = mvpp2_read(priv, MVPP22_CLS_C2_TCAM_INV); + if (c2->valid) + val &= ~MVPP22_CLS_C2_TCAM_INV_BIT; + else + val |= MVPP22_CLS_C2_TCAM_INV_BIT; + mvpp2_write(priv, MVPP22_CLS_C2_TCAM_INV, val); + mvpp2_write(priv, MVPP22_CLS_C2_ACT, c2->act); mvpp2_write(priv, MVPP22_CLS_C2_ATTR0, c2->attr[0]); @@ -509,6 +517,7 @@ static void mvpp2_cls_c2_write(struct mvpp2 *priv, void mvpp2_cls_c2_read(struct mvpp2 *priv, int index, struct mvpp2_cls_c2_entry *c2) { + u32 val; mvpp2_write(priv, MVPP22_CLS_C2_TCAM_IDX, index); c2->index = index; @@ -525,6 +534,9 @@ void mvpp2_cls_c2_read(struct mvpp2 *priv, int index, c2->attr[1] = mvpp2_read(priv, MVPP22_CLS_C2_ATTR1); c2->attr[2] = mvpp2_read(priv, MVPP22_CLS_C2_ATTR2); c2->attr[3] = mvpp2_read(priv, MVPP22_CLS_C2_ATTR3); + + val = mvpp2_read(priv, MVPP22_CLS_C2_TCAM_INV); + c2->valid = !(val & MVPP22_CLS_C2_TCAM_INV_BIT); } /* Initialize the flow table entries for the given flow */ @@ -807,6 +819,8 @@ static void mvpp2_port_c2_cls_init(struct mvpp2_port *port) c2.attr[0] = MVPP22_CLS_C2_ATTR0_QHIGH(qh) | MVPP22_CLS_C2_ATTR0_QLOW(ql); + c2.valid = true; + mvpp2_cls_c2_write(port->priv, &c2); } @@ -815,6 +829,7 @@ void mvpp2_cls_init(struct mvpp2 *priv) { struct mvpp2_cls_lookup_entry le; struct mvpp2_cls_flow_entry fe; + struct mvpp2_cls_c2_entry c2; int index; /* Enable classifier */ @@ -838,6 +853,14 @@ void mvpp2_cls_init(struct mvpp2 *priv) mvpp2_cls_lookup_write(priv, &le); } + /* Clear C2 TCAM engine table */ + memset(&c2, 0, sizeof(c2)); + c2.valid = false; + for (index = 0; index < MVPP22_CLS_C2_N_ENTRIES; index++) { + c2.index = index; + mvpp2_cls_c2_write(priv, &c2); + } + mvpp2_cls_port_init_flows(priv); } |