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authorJakub Kicinski <kuba@kernel.org>2023-07-27 20:32:59 -0700
committerJakub Kicinski <kuba@kernel.org>2023-07-27 20:33:00 -0700
commit85e2a2c42b662a1040b98c67f504f8fa52c52bc0 (patch)
tree1bf390afd7dbb42563472fb223fc5b48fce7d9ca /drivers/net/ethernet/mediatek/mtk_eth_soc.c
parent5908a4c47c9c8d7898841dc3dd2e70aa5d91bc05 (diff)
parentdb845b9b2040f4ed5f8bce6cd30103e3b8557566 (diff)
Merge branch 'net-stmmac-increase-clk_ptp_ref-rate'
Andrew Halaney says: ==================== net: stmmac: Increase clk_ptp_ref rate This series aims to increase the clk_ptp_ref rate to get the best possible PTP timestamping resolution possible. Some modified disclosure about my development/testing process from the RFC/RFT v1 follows. Disclosure: I don't know much about PTP beyond what you can google in an afternoon, don't have access to documentation about the stmmac IP, and have only tested that (based on code comments and git commit history) the programming of the subsecond register (and the clock rate) makes more sense with these changes. Qualcomm has tested a similar change offlist, verifying PTP more formally as I understand it. The last version was an RFC/RFT, but I didn't get a lot of confirmation that doing patch 3 in that series (essentially setting clk_ptp_ref to whatever its max value is) for the whole stmmac ecosystem was a safe idea. So I am erring on the side of caution and doing this for the Qualcomm platform only. See v1 for an approach that would apply to all stmmac platform drivers with clk_ptp_ref. v1: https://lore.kernel.org/netdev/20230711205732.364954-1-ahalaney@redhat.com/ ==================== Link: https://lore.kernel.org/r/20230725211853.895832-2-ahalaney@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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