diff options
author | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2023-07-22 21:32:49 +0100 |
---|---|---|
committer | Paolo Abeni <pabeni@redhat.com> | 2023-07-25 15:02:03 +0200 |
commit | 76a4cb755cf911ad5acdb82f7228a9e22addf52b (patch) | |
tree | 48f2bb0a406cc3247511f996ee086001c92fa845 /drivers/net/ethernet/mediatek/mtk_eth_soc.h | |
parent | ec87f05402f592d27507e1aa6b2fd21c486f2cc0 (diff) |
net: ethernet: mtk_eth_soc: remove incorrect PLL configuration
MT7623 GMAC0 attempts to configure the system clocking according to the
required speed in the .mac_config callback for non-SGMII, non-baseX and
non-TRGMII modes.
state->speed setting has never been reliable in the .mac_config
callback - there are cases where this is not the link speed,
particularly via ethtool paths, so this has always been unreliable (as
detailed in phylink's documentation.)
There is the additional issue that mtk_gmac0_rgmii_adjust() will only
be called if state->interface changes, which means it only configures
the system clocking on the very first .mac_config call, which will be
made when the network device is first brought up before any link is
established.
Essentially, this code is incredibly buggy, and probably never worked.
Moreover, checking the in-kernel DT files, it seems no platform makes
use of this code path.
Therefore, let's remove it, and disable interface modes for port 0 that
are not SGMII, 1000base-X, 2500base-X or TRGMII on the MT7623.
Reviewed-by: Daniel Golle <daniel@makrotopia.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'drivers/net/ethernet/mediatek/mtk_eth_soc.h')
-rw-r--r-- | drivers/net/ethernet/mediatek/mtk_eth_soc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h index 707445f6bcb1..28adda0c90c0 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h @@ -1030,6 +1030,7 @@ struct mtk_soc_data { u16 foe_entry_size; netdev_features_t hw_features; bool has_accounting; + bool disable_pll_modes; struct { u32 txd_size; u32 rxd_size; |