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author | Eugenia Emantayev <eugenia@mellanox.com> | 2017-05-28 14:27:02 +0300 |
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committer | Saeed Mahameed <saeedm@mellanox.com> | 2017-07-27 16:40:17 +0300 |
commit | cf5033089b078303b102b65e3ccbbfa3ce0f4367 (patch) | |
tree | 37f9e2ca5c6243f01e0c35004873086c73dfedab /drivers/net/ethernet/mellanox/mlx5/core/en.h | |
parent | 4272f9b88db9223216cdf87314f570f6d81295b4 (diff) |
net/mlx5e: Add missing support for PTP_CLK_REQ_PPS request
Add the missing option to enable the PTP_CLK_PPS function.
In this case pin should be configured as 1PPS IN first and
then it will be connected to PPS mechanism.
Events will be reported as PTP_CLOCK_PPSUSR events to relevant sysfs.
Fixes: ee7f12205abc ('net/mlx5e: Implement 1PPS support')
Signed-off-by: Eugenia Emantayev <eugenia@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en.h')
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h index d42826f0f0d6..0039b4725405 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h @@ -271,6 +271,7 @@ struct mlx5e_pps { u8 pin_caps[MAX_PIN_NUM]; struct work_struct out_work; u64 start[MAX_PIN_NUM]; + u8 enabled; }; struct mlx5e_tstamp { |