diff options
| author | Tariq Toukan <tariqt@mellanox.com> | 2016-04-29 01:36:32 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2016-04-29 16:29:08 -0400 |
| commit | 1da366964ec907fccdea0339d81c2e9ef3d803f8 (patch) | |
| tree | 0aba5fa6c728d8e92509e27f3f3e6845f695a591 /drivers/net/ethernet/mellanox/mlx5/core/en_fs.c | |
| parent | 01a14098d3374e1b931d605da666300ee248d3d9 (diff) | |
net/mlx5e: Direct TIR per RQ
Introduce new TIRs for direct access per RQ.
Now we have 2 available kinds of TIRs:
- indirect TIR per traffic type, each points to one RQT (RSS RQT)
same as before.
- New direct TIR per RQ, each points to RQT with a size of one
that forwards packets to that RQ only.
Driver will open max channels (num cores) direct TIRs by default,
they will be filled with the actual RQs once channels are allocated.
Needed for downstream aRFS and ethtool direct steering functionalities.
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en_fs.c')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en_fs.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c b/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c index d00a24203410..4df49e660587 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c @@ -247,7 +247,7 @@ static int __mlx5e_add_eth_addr_rule(struct mlx5e_priv *priv, outer_headers.dmac_47_16); u8 *mv_dmac = MLX5_ADDR_OF(fte_match_param, mv, outer_headers.dmac_47_16); - u32 *tirn = priv->tirn; + u32 *tirn = priv->indir_tirn; u32 tt_vec; int err = 0; @@ -274,7 +274,7 @@ static int __mlx5e_add_eth_addr_rule(struct mlx5e_priv *priv, if (tt_vec & BIT(MLX5E_TT_ANY)) { rule_p = &ai->ft_rule[MLX5E_TT_ANY]; - dest.tir_num = tirn[MLX5E_TT_ANY]; + dest.tir_num = priv->direct_tir[0].tirn; *rule_p = mlx5_add_flow_rule(ft, match_criteria_enable, mc, mv, MLX5_FLOW_CONTEXT_ACTION_FWD_DEST, MLX5_FS_DEFAULT_FLOW_TAG, &dest); |