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authorTariq Toukan <tariqt@mellanox.com>2018-03-04 14:25:00 +0200
committerSaeed Mahameed <saeedm@mellanox.com>2018-06-28 14:44:18 -0700
commitdc983f0e2b6e2b514cdb1c687fdf7b5a007f8ea4 (patch)
tree2d8420e74f146c8ecaff023986591a73ca408b59 /drivers/net/ethernet/mellanox/mlx5/core/en_stats.h
parent2d7103c800add14d9ea3194a704130622474d54f (diff)
net/mlx5e: Add a counter for congested UMRs
Add per-ring and global ethtool counters for congested UMR requests. These events indicate congestion in UMR handlers in HW. Such event is concluded when there's an outstanding UMR post, yet the SW consumed at least two additional MPWQEs in the meanwhile. Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en_stats.h')
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/en_stats.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h
index 0cd08b9f46ff..4e54cb86fece 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h
@@ -94,6 +94,7 @@ struct mlx5e_sw_stats {
u64 rx_cache_empty;
u64 rx_cache_busy;
u64 rx_cache_waive;
+ u64 rx_congst_umr;
u64 ch_poll;
u64 ch_arm;
u64 ch_aff_change;
@@ -188,6 +189,7 @@ struct mlx5e_rq_stats {
u64 cache_empty;
u64 cache_busy;
u64 cache_waive;
+ u64 congst_umr;
};
struct mlx5e_sq_stats {