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authorMatan Barak <matanb@mellanox.com>2017-08-07 11:14:11 +0300
committerSaeed Mahameed <saeedm@mellanox.com>2017-08-24 16:02:58 +0300
commit667cb65ae5ad01523505d48d6cfd92bd1d3c9785 (patch)
tree3372de0fb49b1b82f4dfcb2cd26631cb7944741b /drivers/net/ethernet/mellanox/mlx5/core/fs_core.h
parent8ebabaa02fe13e534ae5b0a8aa495762c25ef279 (diff)
net/mlx5: Don't store reserved part in FTEs and FGs
The current code stores fte_match_param in the software representation of FTEs and FGs. fte_match_param contains a large reserved area at the bottom of the struct. Since downstream patches are going to hash this part, we would like to avoid doing so on a reserved part. Signed-off-by: Matan Barak <matanb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/fs_core.h')
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/fs_core.h16
1 files changed, 14 insertions, 2 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h
index 5fbae885558f..bfbc081d17dc 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h
@@ -144,10 +144,22 @@ struct mlx5_fc {
struct mlx5_fc_cache cache ____cacheline_aligned_in_smp;
};
+#define MLX5_FTE_MATCH_PARAM_RESERVED reserved_at_600
+/* Calculate the fte_match_param length and without the reserved length.
+ * Make sure the reserved field is the last.
+ */
+#define MLX5_ST_SZ_DW_MATCH_PARAM \
+ ((MLX5_BYTE_OFF(fte_match_param, MLX5_FTE_MATCH_PARAM_RESERVED) / sizeof(u32)) + \
+ BUILD_BUG_ON_ZERO(MLX5_ST_SZ_BYTES(fte_match_param) != \
+ MLX5_FLD_SZ_BYTES(fte_match_param, \
+ MLX5_FTE_MATCH_PARAM_RESERVED) +\
+ MLX5_BYTE_OFF(fte_match_param, \
+ MLX5_FTE_MATCH_PARAM_RESERVED)))
+
/* Type of children is mlx5_flow_rule */
struct fs_fte {
struct fs_node node;
- u32 val[MLX5_ST_SZ_DW(fte_match_param)];
+ u32 val[MLX5_ST_SZ_DW_MATCH_PARAM];
u32 dests_size;
u32 flow_tag;
u32 index;
@@ -175,7 +187,7 @@ struct mlx5_flow_namespace {
struct mlx5_flow_group_mask {
u8 match_criteria_enable;
- u32 match_criteria[MLX5_ST_SZ_DW(fte_match_param)];
+ u32 match_criteria[MLX5_ST_SZ_DW_MATCH_PARAM];
};
/* Type of children is fs_fte */