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author | Takashi Iwai <tiwai@suse.de> | 2019-05-06 16:14:09 +0200 |
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committer | Takashi Iwai <tiwai@suse.de> | 2019-05-06 16:14:34 +0200 |
commit | d81645510ce2a140816c4cb37c45b78d810ca63f (patch) | |
tree | edd9464900904d22a23da362bb152669480c5d26 /drivers/net/ethernet/mellanox/mlxsw/pci_hw.h | |
parent | 2854cd34fbab5f28a356d3667c26b7856a7b73e2 (diff) | |
parent | 378d590c494551a68a824b939c711bb9a280e9ef (diff) |
Merge tag 'asoc-v5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Updates for v5.2
This is a pretty huge set of changes, it's been a pretty active release
all round but the big thing with this release is the Sound Open Firmware
changes from Intel, providing another DSP framework for use with the
DSPs in their SoCs. This one works with the firmware of the same name
which is free software (unlike the previous DSP firmwares and framework)
and there has been some interest in adoption by other systems already so
hopefully we will see adoption by other vendors in the future.
Other highlights include:
- Support for MCLK/sample rate ratio setting in the generic cards.
- Support for pin switches in the generic cards.
- A big set of improvements to the TLV320AIC32x4 drivers from Annaliese
McDermond.
- New drivers for Freescale audio mixers, several Intel machines,
several Mediatek machines, Meson G12A, Sound Open Firmware and
Spreadtrum compressed audio and DMA devices.
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlxsw/pci_hw.h')
-rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/pci_hw.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h index ffee38e36ce8..8648ca171254 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h +++ b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h @@ -27,7 +27,7 @@ #define MLXSW_PCI_SW_RESET 0xF0010 #define MLXSW_PCI_SW_RESET_RST_BIT BIT(0) -#define MLXSW_PCI_SW_RESET_TIMEOUT_MSECS 13000 +#define MLXSW_PCI_SW_RESET_TIMEOUT_MSECS 20000 #define MLXSW_PCI_SW_RESET_WAIT_MSECS 100 #define MLXSW_PCI_FW_READY 0xA1844 #define MLXSW_PCI_FW_READY_MASK 0xFFFF |