diff options
| author | Maxime Chevallier <maxime.chevallier@bootlin.com> | 2022-08-17 14:32:55 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2022-08-22 13:46:26 +0100 |
| commit | ac0167fb9961ea929e17fad2d703cc1a14dfb7a9 (patch) | |
| tree | 56ec6f6086e8e2d8b1c7f2431bce3e3b0e21b4ab /drivers/net/ethernet/microchip/lan966x/lan966x_main.c | |
| parent | c04ade27cb7b952b6b9b9a0efa0a6129cc63f2ae (diff) | |
net: lan966x: Add QUSGMII support for lan966x
The Lan996x controller supports the QUSGMII mode, which is very similar
to QSGMII in the way it's configured and the autonegociation
capababilities it provides.
This commit adds support for that mode, treating it most of the time
like QSGMII, making sure that we do configure the PCS how we should.
Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/microchip/lan966x/lan966x_main.c')
| -rw-r--r-- | drivers/net/ethernet/microchip/lan966x/lan966x_main.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_main.c b/drivers/net/ethernet/microchip/lan966x/lan966x_main.c index d928b75f3780..2ad078608c45 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_main.c +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_main.c @@ -778,6 +778,8 @@ static int lan966x_probe_port(struct lan966x *lan966x, u32 p, port->phylink_config.supported_interfaces); __set_bit(PHY_INTERFACE_MODE_QSGMII, port->phylink_config.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_QUSGMII, + port->phylink_config.supported_interfaces); __set_bit(PHY_INTERFACE_MODE_1000BASEX, port->phylink_config.supported_interfaces); __set_bit(PHY_INTERFACE_MODE_2500BASEX, |