diff options
| author | Horatiu Vultur <horatiu.vultur@microchip.com> | 2022-03-04 12:08:56 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2022-03-04 13:03:09 +0000 |
| commit | 0933bd04047c3b96ba49545a8f91e7e6f8f666ff (patch) | |
| tree | e9e71bcf96504b000ce7c72c27fd6a023f619c97 /drivers/net/ethernet/microchip/sparx5/sparx5_main.h | |
| parent | 3193a6118140707c19db5b734f6b2afdbc743e62 (diff) | |
net: sparx5: Add support for ptp clocks
The sparx5 has 3 PHC. Enable each of them, for now all the
timestamping is happening on the first PHC.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/microchip/sparx5/sparx5_main.h')
| -rw-r--r-- | drivers/net/ethernet/microchip/sparx5/sparx5_main.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h index 6f0b6e60ceb8..cf68b3f90834 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h @@ -14,6 +14,8 @@ #include <linux/if_vlan.h> #include <linux/bitmap.h> #include <linux/phylink.h> +#include <linux/net_tstamp.h> +#include <linux/ptp_clock_kernel.h> #include <linux/hrtimer.h> #include "sparx5_main_regs.h" @@ -79,6 +81,9 @@ enum sparx5_vlan_port_type { #define FDMA_RX_DCB_MAX_DBS 15 #define FDMA_TX_DCB_MAX_DBS 1 +#define SPARX5_PHC_COUNT 3 +#define SPARX5_PHC_PORT 0 + struct sparx5; struct sparx5_db_hw { @@ -178,6 +183,14 @@ enum sparx5_core_clockfreq { SPX5_CORE_CLOCK_625MHZ, /* 625MHZ core clock frequency */ }; +struct sparx5_phc { + struct ptp_clock *clock; + struct ptp_clock_info info; + struct hwtstamp_config hwtstamp_config; + struct sparx5 *sparx5; + u8 index; +}; + struct sparx5 { struct platform_device *pdev; struct device *dev; @@ -225,6 +238,10 @@ struct sparx5 { int fdma_irq; struct sparx5_rx rx; struct sparx5_tx tx; + /* PTP */ + bool ptp; + struct sparx5_phc phc[SPARX5_PHC_COUNT]; + spinlock_t ptp_clock_lock; /* lock for phc */ }; /* sparx5_switchdev.c */ @@ -294,6 +311,10 @@ int sparx5_register_netdevs(struct sparx5 *sparx5); void sparx5_destroy_netdevs(struct sparx5 *sparx5); void sparx5_unregister_netdevs(struct sparx5 *sparx5); +/* sparx5_ptp.c */ +int sparx5_ptp_init(struct sparx5 *sparx5); +void sparx5_ptp_deinit(struct sparx5 *sparx5); + /* Clock period in picoseconds */ static inline u32 sparx5_clk_period(enum sparx5_core_clockfreq cclock) { |