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authorLinus Torvalds <torvalds@linux-foundation.org>2020-08-05 20:13:21 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2020-08-05 20:13:21 -0700
commit47ec5303d73ea344e84f46660fff693c57641386 (patch)
treea2252debab749de29620c43285295d60c4741119 /drivers/net/ethernet/qlogic/qed/qed_int.c
parent8186749621ed6b8fc42644c399e8c755a2b6f630 (diff)
parentc1055b76ad00aed0e8b79417080f212d736246b6 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next
Pull networking updates from David Miller: 1) Support 6Ghz band in ath11k driver, from Rajkumar Manoharan. 2) Support UDP segmentation in code TSO code, from Eric Dumazet. 3) Allow flashing different flash images in cxgb4 driver, from Vishal Kulkarni. 4) Add drop frames counter and flow status to tc flower offloading, from Po Liu. 5) Support n-tuple filters in cxgb4, from Vishal Kulkarni. 6) Various new indirect call avoidance, from Eric Dumazet and Brian Vazquez. 7) Fix BPF verifier failures on 32-bit pointer arithmetic, from Yonghong Song. 8) Support querying and setting hardware address of a port function via devlink, use this in mlx5, from Parav Pandit. 9) Support hw ipsec offload on bonding slaves, from Jarod Wilson. 10) Switch qca8k driver over to phylink, from Jonathan McDowell. 11) In bpftool, show list of processes holding BPF FD references to maps, programs, links, and btf objects. From Andrii Nakryiko. 12) Several conversions over to generic power management, from Vaibhav Gupta. 13) Add support for SO_KEEPALIVE et al. to bpf_setsockopt(), from Dmitry Yakunin. 14) Various https url conversions, from Alexander A. Klimov. 15) Timestamping and PHC support for mscc PHY driver, from Antoine Tenart. 16) Support bpf iterating over tcp and udp sockets, from Yonghong Song. 17) Support 5GBASE-T i40e NICs, from Aleksandr Loktionov. 18) Add kTLS RX HW offload support to mlx5e, from Tariq Toukan. 19) Fix the ->ndo_start_xmit() return type to be netdev_tx_t in several drivers. From Luc Van Oostenryck. 20) XDP support for xen-netfront, from Denis Kirjanov. 21) Support receive buffer autotuning in MPTCP, from Florian Westphal. 22) Support EF100 chip in sfc driver, from Edward Cree. 23) Add XDP support to mvpp2 driver, from Matteo Croce. 24) Support MPTCP in sock_diag, from Paolo Abeni. 25) Commonize UDP tunnel offloading code by creating udp_tunnel_nic infrastructure, from Jakub Kicinski. 26) Several pci_ --> dma_ API conversions, from Christophe JAILLET. 27) Add FLOW_ACTION_POLICE support to mlxsw, from Ido Schimmel. 28) Add SK_LOOKUP bpf program type, from Jakub Sitnicki. 29) Refactor a lot of networking socket option handling code in order to avoid set_fs() calls, from Christoph Hellwig. 30) Add rfc4884 support to icmp code, from Willem de Bruijn. 31) Support TBF offload in dpaa2-eth driver, from Ioana Ciornei. 32) Support XDP_REDIRECT in qede driver, from Alexander Lobakin. 33) Support PCI relaxed ordering in mlx5 driver, from Aya Levin. 34) Support TCP syncookies in MPTCP, from Flowian Westphal. 35) Fix several tricky cases of PMTU handling wrt. briding, from Stefano Brivio. * git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (2056 commits) net: thunderx: initialize VF's mailbox mutex before first usage usb: hso: remove bogus check for EINPROGRESS usb: hso: no complaint about kmalloc failure hso: fix bailout in error case of probe ip_tunnel_core: Fix build for archs without _HAVE_ARCH_IPV6_CSUM selftests/net: relax cpu affinity requirement in msg_zerocopy test mptcp: be careful on subflow creation selftests: rtnetlink: make kci_test_encap() return sub-test result selftests: rtnetlink: correct the final return value for the test net: dsa: sja1105: use detected device id instead of DT one on mismatch tipc: set ub->ifindex for local ipv6 address ipv6: add ipv6_dev_find() net: openvswitch: silence suspicious RCU usage warning Revert "vxlan: fix tos value before xmit" ptp: only allow phase values lower than 1 period farsync: switch from 'pci_' to 'dma_' API wan: wanxl: switch from 'pci_' to 'dma_' API hv_netvsc: do not use VF device if link is down dpaa2-eth: Fix passing zero to 'PTR_ERR' warning net: macb: Properly handle phylink on at91sam9x ...
Diffstat (limited to 'drivers/net/ethernet/qlogic/qed/qed_int.c')
-rw-r--r--drivers/net/ethernet/qlogic/qed/qed_int.c153
1 files changed, 67 insertions, 86 deletions
diff --git a/drivers/net/ethernet/qlogic/qed/qed_int.c b/drivers/net/ethernet/qlogic/qed/qed_int.c
index 5eec1fc6229d..f8c5a864812d 100644
--- a/drivers/net/ethernet/qlogic/qed/qed_int.c
+++ b/drivers/net/ethernet/qlogic/qed/qed_int.c
@@ -1,33 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
/* QLogic qed NIC Driver
* Copyright (c) 2015-2017 QLogic Corporation
- *
- * This software is available to you under a choice of one of two
- * licenses. You may choose to be licensed under the terms of the GNU
- * General Public License (GPL) Version 2, available from the file
- * COPYING in the main directory of this source tree, or the
- * OpenIB.org BSD license below:
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- *
- * - Redistributions of source code must retain the above
- * copyright notice, this list of conditions and the following
- * disclaimer.
- *
- * - Redistributions in binary form must reproduce the above
- * copyright notice, this list of conditions and the following
- * disclaimer in the documentation and /or other materials
- * provided with the distribution.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
+ * Copyright (c) 2019-2020 Marvell International Ltd.
*/
#include <linux/types.h>
@@ -850,11 +824,12 @@ static inline u16 qed_attn_update_idx(struct qed_hwfn *p_hwfn,
}
/**
- * @brief qed_int_assertion - handles asserted attention bits
+ * qed_int_assertion() - Handle asserted attention bits.
*
- * @param p_hwfn
- * @param asserted_bits newly asserted bits
- * @return int
+ * @p_hwfn: HW device data.
+ * @asserted_bits: Newly asserted bits.
+ *
+ * Return: Zero value.
*/
static int qed_int_assertion(struct qed_hwfn *p_hwfn, u16 asserted_bits)
{
@@ -914,16 +889,17 @@ static void qed_int_attn_print(struct qed_hwfn *p_hwfn,
}
/**
- * @brief qed_int_deassertion_aeu_bit - handles the effects of a single
- * cause of the attention
+ * qed_int_deassertion_aeu_bit() - Handles the effects of a single
+ * cause of the attention.
*
- * @param p_hwfn
- * @param p_aeu - descriptor of an AEU bit which caused the attention
- * @param aeu_en_reg - register offset of the AEU enable reg. which configured
- * this bit to this group.
- * @param bit_index - index of this bit in the aeu_en_reg
+ * @p_hwfn: HW device data.
+ * @p_aeu: Descriptor of an AEU bit which caused the attention.
+ * @aeu_en_reg: Register offset of the AEU enable reg. which configured
+ * this bit to this group.
+ * @p_bit_name: AEU bit description for logging purposes.
+ * @bitmask: Index of this bit in the aeu_en_reg.
*
- * @return int
+ * Return: Zero on success, negative errno otherwise.
*/
static int
qed_int_deassertion_aeu_bit(struct qed_hwfn *p_hwfn,
@@ -972,12 +948,12 @@ out:
}
/**
- * @brief qed_int_deassertion_parity - handle a single parity AEU source
+ * qed_int_deassertion_parity() - Handle a single parity AEU source.
*
- * @param p_hwfn
- * @param p_aeu - descriptor of an AEU bit which caused the parity
- * @param aeu_en_reg - address of the AEU enable register
- * @param bit_index
+ * @p_hwfn: HW device data.
+ * @p_aeu: Descriptor of an AEU bit which caused the parity.
+ * @aeu_en_reg: Address of the AEU enable register.
+ * @bit_index: Index (0-31) of an AEU bit.
*/
static void qed_int_deassertion_parity(struct qed_hwfn *p_hwfn,
struct aeu_invert_reg_bit *p_aeu,
@@ -1010,12 +986,13 @@ static void qed_int_deassertion_parity(struct qed_hwfn *p_hwfn,
}
/**
- * @brief - handles deassertion of previously asserted attentions.
+ * qed_int_deassertion() - Handle deassertion of previously asserted
+ * attentions.
*
- * @param p_hwfn
- * @param deasserted_bits - newly deasserted bits
- * @return int
+ * @p_hwfn: HW device data.
+ * @deasserted_bits: newly deasserted bits.
*
+ * Return: Zero value.
*/
static int qed_int_deassertion(struct qed_hwfn *p_hwfn,
u16 deasserted_bits)
@@ -1223,16 +1200,15 @@ static int qed_int_attentions(struct qed_hwfn *p_hwfn)
static void qed_sb_ack_attn(struct qed_hwfn *p_hwfn,
void __iomem *igu_addr, u32 ack_cons)
{
- struct igu_prod_cons_update igu_ack = { 0 };
+ u32 igu_ack;
- igu_ack.sb_id_and_flags =
- ((ack_cons << IGU_PROD_CONS_UPDATE_SB_INDEX_SHIFT) |
- (1 << IGU_PROD_CONS_UPDATE_UPDATE_FLAG_SHIFT) |
- (IGU_INT_NOP << IGU_PROD_CONS_UPDATE_ENABLE_INT_SHIFT) |
- (IGU_SEG_ACCESS_ATTN <<
- IGU_PROD_CONS_UPDATE_SEGMENT_ACCESS_SHIFT));
+ igu_ack = ((ack_cons << IGU_PROD_CONS_UPDATE_SB_INDEX_SHIFT) |
+ (1 << IGU_PROD_CONS_UPDATE_UPDATE_FLAG_SHIFT) |
+ (IGU_INT_NOP << IGU_PROD_CONS_UPDATE_ENABLE_INT_SHIFT) |
+ (IGU_SEG_ACCESS_ATTN <<
+ IGU_PROD_CONS_UPDATE_SEGMENT_ACCESS_SHIFT));
- DIRECT_REG_WR(igu_addr, igu_ack.sb_id_and_flags);
+ DIRECT_REG_WR(igu_addr, igu_ack);
/* Both segments (interrupts & acks) are written to same place address;
* Need to guarantee all commands will be received (in-order) by HW.
@@ -1446,16 +1422,16 @@ void qed_init_cau_sb_entry(struct qed_hwfn *p_hwfn,
u8 pf_id, u16 vf_number, u8 vf_valid)
{
struct qed_dev *cdev = p_hwfn->cdev;
- u32 cau_state;
+ u32 cau_state, params = 0, data = 0;
u8 timer_res;
memset(p_sb_entry, 0, sizeof(*p_sb_entry));
- SET_FIELD(p_sb_entry->params, CAU_SB_ENTRY_PF_NUMBER, pf_id);
- SET_FIELD(p_sb_entry->params, CAU_SB_ENTRY_VF_NUMBER, vf_number);
- SET_FIELD(p_sb_entry->params, CAU_SB_ENTRY_VF_VALID, vf_valid);
- SET_FIELD(p_sb_entry->params, CAU_SB_ENTRY_SB_TIMESET0, 0x7F);
- SET_FIELD(p_sb_entry->params, CAU_SB_ENTRY_SB_TIMESET1, 0x7F);
+ SET_FIELD(params, CAU_SB_ENTRY_PF_NUMBER, pf_id);
+ SET_FIELD(params, CAU_SB_ENTRY_VF_NUMBER, vf_number);
+ SET_FIELD(params, CAU_SB_ENTRY_VF_VALID, vf_valid);
+ SET_FIELD(params, CAU_SB_ENTRY_SB_TIMESET0, 0x7F);
+ SET_FIELD(params, CAU_SB_ENTRY_SB_TIMESET1, 0x7F);
cau_state = CAU_HC_DISABLE_STATE;
@@ -1474,7 +1450,8 @@ void qed_init_cau_sb_entry(struct qed_hwfn *p_hwfn,
timer_res = 1;
else
timer_res = 2;
- SET_FIELD(p_sb_entry->params, CAU_SB_ENTRY_TIMER_RES0, timer_res);
+
+ SET_FIELD(params, CAU_SB_ENTRY_TIMER_RES0, timer_res);
if (cdev->tx_coalesce_usecs <= 0x7F)
timer_res = 0;
@@ -1482,10 +1459,13 @@ void qed_init_cau_sb_entry(struct qed_hwfn *p_hwfn,
timer_res = 1;
else
timer_res = 2;
- SET_FIELD(p_sb_entry->params, CAU_SB_ENTRY_TIMER_RES1, timer_res);
- SET_FIELD(p_sb_entry->data, CAU_SB_ENTRY_STATE0, cau_state);
- SET_FIELD(p_sb_entry->data, CAU_SB_ENTRY_STATE1, cau_state);
+ SET_FIELD(params, CAU_SB_ENTRY_TIMER_RES1, timer_res);
+ p_sb_entry->params = cpu_to_le32(params);
+
+ SET_FIELD(data, CAU_SB_ENTRY_STATE0, cau_state);
+ SET_FIELD(data, CAU_SB_ENTRY_STATE1, cau_state);
+ p_sb_entry->data = cpu_to_le32(data);
}
static void qed_int_cau_conf_pi(struct qed_hwfn *p_hwfn,
@@ -1495,31 +1475,27 @@ static void qed_int_cau_conf_pi(struct qed_hwfn *p_hwfn,
enum qed_coalescing_fsm coalescing_fsm,
u8 timeset)
{
- struct cau_pi_entry pi_entry;
u32 sb_offset, pi_offset;
+ u32 prod = 0;
if (IS_VF(p_hwfn->cdev))
return;
- sb_offset = igu_sb_id * PIS_PER_SB_E4;
- memset(&pi_entry, 0, sizeof(struct cau_pi_entry));
-
- SET_FIELD(pi_entry.prod, CAU_PI_ENTRY_PI_TIMESET, timeset);
+ SET_FIELD(prod, CAU_PI_ENTRY_PI_TIMESET, timeset);
if (coalescing_fsm == QED_COAL_RX_STATE_MACHINE)
- SET_FIELD(pi_entry.prod, CAU_PI_ENTRY_FSM_SEL, 0);
+ SET_FIELD(prod, CAU_PI_ENTRY_FSM_SEL, 0);
else
- SET_FIELD(pi_entry.prod, CAU_PI_ENTRY_FSM_SEL, 1);
+ SET_FIELD(prod, CAU_PI_ENTRY_FSM_SEL, 1);
+ sb_offset = igu_sb_id * PIS_PER_SB_E4;
pi_offset = sb_offset + pi_index;
- if (p_hwfn->hw_init_done) {
+
+ if (p_hwfn->hw_init_done)
qed_wr(p_hwfn, p_ptt,
- CAU_REG_PI_MEMORY + pi_offset * sizeof(u32),
- *((u32 *)&(pi_entry)));
- } else {
- STORE_RT_REG(p_hwfn,
- CAU_REG_PI_MEMORY_RT_OFFSET + pi_offset,
- *((u32 *)&(pi_entry)));
- }
+ CAU_REG_PI_MEMORY + pi_offset * sizeof(u32), prod);
+ else
+ STORE_RT_REG(p_hwfn, CAU_REG_PI_MEMORY_RT_OFFSET + pi_offset,
+ prod);
}
void qed_int_cau_conf_sb(struct qed_hwfn *p_hwfn,
@@ -2276,9 +2252,9 @@ int qed_int_igu_read_cam(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
}
/**
- * @brief Initialize igu runtime registers
+ * qed_int_igu_init_rt() - Initialize IGU runtime registers.
*
- * @param p_hwfn
+ * @p_hwfn: HW device data.
*/
void qed_int_igu_init_rt(struct qed_hwfn *p_hwfn)
{
@@ -2388,6 +2364,7 @@ int qed_int_set_timer_res(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
u8 timer_res, u16 sb_id, bool tx)
{
struct cau_sb_entry sb_entry;
+ u32 params;
int rc;
if (!p_hwfn->hw_init_done) {
@@ -2403,10 +2380,14 @@ int qed_int_set_timer_res(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
return rc;
}
+ params = le32_to_cpu(sb_entry.params);
+
if (tx)
- SET_FIELD(sb_entry.params, CAU_SB_ENTRY_TIMER_RES1, timer_res);
+ SET_FIELD(params, CAU_SB_ENTRY_TIMER_RES1, timer_res);
else
- SET_FIELD(sb_entry.params, CAU_SB_ENTRY_TIMER_RES0, timer_res);
+ SET_FIELD(params, CAU_SB_ENTRY_TIMER_RES0, timer_res);
+
+ sb_entry.params = cpu_to_le32(params);
rc = qed_dmae_host2grc(p_hwfn, p_ptt,
(u64)(uintptr_t)&sb_entry,