diff options
| author | Mintz, Yuval <Yuval.Mintz@cavium.com> | 2017-05-29 09:53:14 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2017-05-30 12:07:04 -0400 |
| commit | fc6575bc498cb86e33a39a399355fd7e74ef2002 (patch) | |
| tree | c5488e2067ca56f158a56484a095dd89e3826fcd /drivers/net/ethernet/qlogic/qed/qed_reg_addr.h | |
| parent | 9790c35e9682e0e158653108cc6950f2be196c80 (diff) | |
qed: Cache alignemnt padding to match host
Improve PCI performance by adjusting padding sizes to match those of the
host machine's cacheline.
Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/qlogic/qed/qed_reg_addr.h')
| -rw-r--r-- | drivers/net/ethernet/qlogic/qed/qed_reg_addr.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/qlogic/qed/qed_reg_addr.h b/drivers/net/ethernet/qlogic/qed/qed_reg_addr.h index 6abf91807265..67172d7a7868 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_reg_addr.h +++ b/drivers/net/ethernet/qlogic/qed/qed_reg_addr.h @@ -1559,6 +1559,7 @@ #define PGLUE_B_REG_PGL_ADDR_EC_F0_K2 0x2aaf9cUL #define PGLUE_B_REG_PGL_ADDR_F0_F0_K2 0x2aafa0UL #define PGLUE_B_REG_PGL_ADDR_F4_F0_K2 0x2aafa4UL +#define PGLUE_B_REG_MASTER_WRITE_PAD_ENABLE 0x2aae30UL #define NIG_REG_TSGEN_FREECNT_UPDATE_K2 0x509008UL #define CNIG_REG_NIG_PORT0_CONF_K2 0x218200UL |