diff options
| author | Ong Boon Leong <boon.leong.ong@intel.com> | 2021-03-18 08:50:53 +0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-03-18 14:34:07 -0700 |
| commit | 9f298959191b0a3a8451ad308a68a9d697ea6819 (patch) | |
| tree | d48293ea9707a0111479b85ae325afc20470e5ea /drivers/net/ethernet/stmicro/stmmac/dwmac5.c | |
| parent | e49aa315cb01828e7aec0710f3b954e80ba70dd8 (diff) | |
net: stmmac: Add EST errors into ethtool statistic
Below EST errors are added into ethtool statistic:
1) Constant Gate Control Error (CGCE):
The counter "mtl_est_cgce" increases everytime CGCE interrupt is
triggered.
2) Head-of-Line Blocking due to Scheduling (HLBS):
The counter "mtl_est_hlbs" increases everytime HLBS interrupt is
triggered.
3) Head-of-Line Blocking due to Frame Size (HLBF):
The counter "mtl_est_hlbf" increases everytime HLBF interrupt is
triggered.
4) Base Time Register error (BTRE):
The counter "mtl_est_btre" increases everytime BTRE interrupt is
triggered but BTRL not reaches maximum value of 15.
5) Base Time Register Error Loop Count (BTRL) reaches maximum value:
The counter "mtl_est_btrlm" increases everytime BTRE interrupt is
triggered and BTRL value reaches maximum value of 15.
Please refer to MTL_EST_STATUS register in DesignWare Cores Ethernet
Quality-of-Service Databook for more detail explanation.
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: Voon Weifeng <weifeng.voon@intel.com>
Co-developed-by: Mohammad Athari Bin Ismail <mohammad.athari.ismail@intel.com>
Signed-off-by: Mohammad Athari Bin Ismail <mohammad.athari.ismail@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/dwmac5.c')
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/dwmac5.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac5.c b/drivers/net/ethernet/stmicro/stmmac/dwmac5.c index 809015f59ee2..0ae85f8adf67 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac5.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac5.c @@ -608,7 +608,7 @@ int dwmac5_est_configure(void __iomem *ioaddr, struct stmmac_est *cfg, } void dwmac5_est_irq_status(void __iomem *ioaddr, struct net_device *dev, - u32 txqcnt) + struct stmmac_extra_stats *x, u32 txqcnt) { u32 status, value, feqn, hbfq, hbfs, btrl; u32 txqcnt_mask = (1 << txqcnt) - 1; @@ -624,12 +624,16 @@ void dwmac5_est_irq_status(void __iomem *ioaddr, struct net_device *dev, if (status & CGCE) { /* Clear Interrupt */ writel(CGCE, ioaddr + MTL_EST_STATUS); + + x->mtl_est_cgce++; } if (status & HLBS) { value = readl(ioaddr + MTL_EST_SCH_ERR); value &= txqcnt_mask; + x->mtl_est_hlbs++; + /* Clear Interrupt */ writel(value, ioaddr + MTL_EST_SCH_ERR); @@ -649,6 +653,8 @@ void dwmac5_est_irq_status(void __iomem *ioaddr, struct net_device *dev, hbfq = (value & SZ_CAP_HBFQ_MASK(txqcnt)) >> SZ_CAP_HBFQ_SHIFT; hbfs = value & SZ_CAP_HBFS_MASK; + x->mtl_est_hlbf++; + /* Clear Interrupt */ writel(feqn, ioaddr + MTL_EST_FRM_SZ_ERR); @@ -658,6 +664,11 @@ void dwmac5_est_irq_status(void __iomem *ioaddr, struct net_device *dev, } if (status & BTRE) { + if ((status & BTRL) == BTRL_MAX) + x->mtl_est_btrlm++; + else + x->mtl_est_btre++; + btrl = (status & BTRL) >> BTRL_SHIFT; if (net_ratelimit()) |