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authorDavid S. Miller <davem@davemloft.net>2019-12-18 12:14:08 -0800
committerDavid S. Miller <davem@davemloft.net>2019-12-18 12:14:08 -0800
commit6dbb2e91f8bd4ad171f03f09979d2bf8e6a46306 (patch)
tree4f45bbf8306ab58c31a6b8d0ed3b2029fffba25d /drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h
parent1f2565780e9b7218cf92c7630130e82dcc0fe9c2 (diff)
parent3755b21b04b096347605d17008c6b6a8cf3f59e4 (diff)
Merge branch 'stmmac-next'
Jose Abreu says: ==================== net: stmmac: Improvements for -next Misc improvements for stmmac. 1) Adds more information regarding HW Caps in the DebugFS file. 2) Allows interrupts to be independently enabled or disabled so that we don't have to schedule both TX and RX NAPIs. 3) Stops using a magic number in coalesce timer re-arm. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h')
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h b/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h
index 292b880f3f9f..e5dbd0bc257e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h
@@ -96,6 +96,8 @@
/* DMA default interrupt mask */
#define DMA_INTR_DEFAULT_MASK (DMA_INTR_NORMAL | DMA_INTR_ABNORMAL)
+#define DMA_INTR_DEFAULT_RX (DMA_INTR_ENA_RIE)
+#define DMA_INTR_DEFAULT_TX (DMA_INTR_ENA_TIE)
/* DMA Status register defines */
#define DMA_STATUS_GLPII 0x40000000 /* GMAC LPI interrupt */
@@ -130,8 +132,8 @@
#define NUM_DWMAC1000_DMA_REGS 23
void dwmac_enable_dma_transmission(void __iomem *ioaddr);
-void dwmac_enable_dma_irq(void __iomem *ioaddr, u32 chan);
-void dwmac_disable_dma_irq(void __iomem *ioaddr, u32 chan);
+void dwmac_enable_dma_irq(void __iomem *ioaddr, u32 chan, bool rx, bool tx);
+void dwmac_disable_dma_irq(void __iomem *ioaddr, u32 chan, bool rx, bool tx);
void dwmac_dma_start_tx(void __iomem *ioaddr, u32 chan);
void dwmac_dma_stop_tx(void __iomem *ioaddr, u32 chan);
void dwmac_dma_start_rx(void __iomem *ioaddr, u32 chan);