diff options
| author | Andre Przywara <andre.przywara@arm.com> | 2020-03-24 13:23:42 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2020-03-24 16:33:04 -0700 |
| commit | c30cb8f0bec69d56e1fbc7fb65bd735c729a69e4 (patch) | |
| tree | 8958ac24a670944527bea8c976339cc79e964da1 /drivers/net/ethernet/xilinx/xilinx_axienet.h | |
| parent | d6349e3e14c7f7b7e5cfec09a873af8c192f1271 (diff) | |
net: axienet: Drop MDIO interrupt registers from ethtools dump
Newer revisions of the IP don't have these registers. Since we don't
really use them, just drop them from the ethtools dump.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/xilinx/xilinx_axienet.h')
| -rw-r--r-- | drivers/net/ethernet/xilinx/xilinx_axienet.h | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet.h b/drivers/net/ethernet/xilinx/xilinx_axienet.h index 04e51af32178..fb7450ca5c53 100644 --- a/drivers/net/ethernet/xilinx/xilinx_axienet.h +++ b/drivers/net/ethernet/xilinx/xilinx_axienet.h @@ -165,13 +165,6 @@ #define XAE_MDIO_MCR_OFFSET 0x00000504 /* MII Management Control */ #define XAE_MDIO_MWD_OFFSET 0x00000508 /* MII Management Write Data */ #define XAE_MDIO_MRD_OFFSET 0x0000050C /* MII Management Read Data */ -#define XAE_MDIO_MIS_OFFSET 0x00000600 /* MII Management Interrupt Status */ -/* MII Mgmt Interrupt Pending register offset */ -#define XAE_MDIO_MIP_OFFSET 0x00000620 -/* MII Management Interrupt Enable register offset */ -#define XAE_MDIO_MIE_OFFSET 0x00000640 -/* MII Management Interrupt Clear register offset. */ -#define XAE_MDIO_MIC_OFFSET 0x00000660 #define XAE_UAW0_OFFSET 0x00000700 /* Unicast address word 0 */ #define XAE_UAW1_OFFSET 0x00000704 /* Unicast address word 1 */ #define XAE_FMI_OFFSET 0x00000708 /* Filter Mask Index */ |