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authorFlorian Fainelli <f.fainelli@gmail.com>2020-02-19 12:00:49 -0800
committerDavid S. Miller <davem@davemloft.net>2020-02-19 16:36:48 -0800
commitfe26821fa614d1d9dbfa48839b5a357d2d8b6f7d (patch)
treee45565eeda14889b4a89fb3a174292001feed31c /drivers/net/phy/broadcom.c
parentcb64da3a5b60b7e9312ade2d6892a1fe657d23b1 (diff)
net: phy: broadcom: Wire suspend/resume for BCM54810
The BCM54810 PHY can use the standard BMCR Power down suspend, but needs a custom resume routine which first clear the Power down bit, and then re-initializes the PHY. While in low-power mode, the PHY only accepts writes to the BMCR register. The datasheet clearly says it: Reads or writes to any MII register other than MII Control register (address 00h) while the device is in the standby power-down mode may cause unpredictable results. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/broadcom.c')
-rw-r--r--drivers/net/phy/broadcom.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c
index b4eae84a9195..ab24692a92c6 100644
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
@@ -313,6 +313,20 @@ static int bcm54xx_config_init(struct phy_device *phydev)
return 0;
}
+static int bcm54xx_resume(struct phy_device *phydev)
+{
+ int ret;
+
+ /* Writes to register other than BMCR would be ignored
+ * unless we clear the PDOWN bit first
+ */
+ ret = genphy_resume(phydev);
+ if (ret < 0)
+ return ret;
+
+ return bcm54xx_config_init(phydev);
+}
+
static int bcm5482_config_init(struct phy_device *phydev)
{
int err, reg;
@@ -706,6 +720,8 @@ static struct phy_driver broadcom_drivers[] = {
.config_aneg = bcm5481_config_aneg,
.ack_interrupt = bcm_phy_ack_intr,
.config_intr = bcm_phy_config_intr,
+ .suspend = genphy_suspend,
+ .resume = bcm54xx_resume,
}, {
.phy_id = PHY_ID_BCM5482,
.phy_id_mask = 0xfffffff0,