diff options
| author | Russell King <rmk+kernel@armlinux.org.uk> | 2020-01-04 00:41:35 +0000 |
|---|---|---|
| committer | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2022-06-21 10:57:39 +0100 |
| commit | 87232ebda7ee5593c9cdf59ae2fb425a3953b933 (patch) | |
| tree | d85af1af5411f9273ffa6bf32426e2d6f121ae13 /drivers/net/phy/marvell10g.c | |
| parent | ca26f915cca80aec25743471e7c01a76349600c9 (diff) | |
net: phy: marvell*: add support for hw resolved pause modes
Support reporting the hardware resolved pause enablement states via
phylib, overriding our software implementation.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'drivers/net/phy/marvell10g.c')
| -rw-r--r-- | drivers/net/phy/marvell10g.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c index 3c66b653bfd9..6a21e79224ea 100644 --- a/drivers/net/phy/marvell10g.c +++ b/drivers/net/phy/marvell10g.c @@ -83,6 +83,8 @@ enum { MV_PCS_CSSR1_SPD1_10 = 0x0000, MV_PCS_CSSR1_DUPLEX_FULL= BIT(13), MV_PCS_CSSR1_RESOLVED = BIT(11), + MV_PCS_CSSR1_TX_PAUSE = BIT(9), + MV_PCS_CSSR1_RX_PAUSE = BIT(8), MV_PCS_CSSR1_MDIX = BIT(6), MV_PCS_CSSR1_SPD2_MASK = 0x000c, MV_PCS_CSSR1_SPD2_5000 = 0x0008, @@ -974,6 +976,10 @@ static int mv3310_read_status_copper(struct phy_device *phydev) phydev->mdix = cssr1 & MV_PCS_CSSR1_MDIX ? ETH_TP_MDI_X : ETH_TP_MDI; + phydev->resolved_tx_pause = !!(cssr1 & MV_PCS_CSSR1_TX_PAUSE); + phydev->resolved_rx_pause = !!(cssr1 & MV_PCS_CSSR1_RX_PAUSE); + phydev->resolved_pause_valid = true; + if (val & MDIO_AN_STAT1_COMPLETE) { val = genphy_c45_read_lpa(phydev); if (val < 0) |