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authorJerome Brunet <jbrunet@baylibre.com>2019-03-14 14:49:45 +0100
committerDavid S. Miller <davem@davemloft.net>2019-03-15 15:33:43 -0700
commitdaa5c4d0167a308306525fd5ab9a5e18e21f4f74 (patch)
tree15a9c57a5c0f59aa9e31f0dad2a71baa966a1f31 /drivers/net/phy/meson-gxl.c
parent8a3c245c031944f2176118270e7bc5d4fd4a1075 (diff)
net: phy: meson-gxl: fix interrupt support
If an interrupt is already pending when the interrupt is enabled on the GXL phy, no IRQ will ever be triggered. The fix is simply to make sure pending IRQs are cleared before setting up the irq mask. Fixes: cf127ff20af1 ("net: phy: meson-gxl: add interrupt support") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/meson-gxl.c')
-rw-r--r--drivers/net/phy/meson-gxl.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/net/phy/meson-gxl.c b/drivers/net/phy/meson-gxl.c
index a238388eb1a5..0eec2913c289 100644
--- a/drivers/net/phy/meson-gxl.c
+++ b/drivers/net/phy/meson-gxl.c
@@ -201,6 +201,7 @@ static int meson_gxl_ack_interrupt(struct phy_device *phydev)
static int meson_gxl_config_intr(struct phy_device *phydev)
{
u16 val;
+ int ret;
if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
val = INTSRC_ANEG_PR
@@ -213,6 +214,11 @@ static int meson_gxl_config_intr(struct phy_device *phydev)
val = 0;
}
+ /* Ack any pending IRQ */
+ ret = meson_gxl_ack_interrupt(phydev);
+ if (ret)
+ return ret;
+
return phy_write(phydev, INTSRC_MASK, val);
}