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authorArun Ramadoss <arun.ramadoss@microchip.com>2022-03-04 15:13:56 +0530
committerDavid S. Miller <davem@davemloft.net>2022-03-04 12:45:18 +0000
commit8eee3d3536268f3f4468dd9e9deeec1492761786 (patch)
treee265112ceffa4ba3206dfbcf5107b925655e17a0 /drivers/net/phy/microchip_t1.c
parent828553d2c3b07ec419e6f080c1e74efff31bc774 (diff)
net: phy: used genphy_soft_reset for phy reset in LAN87xx
Replaced the current code of resetting of LAN87xx phy to genphy_soft_reset library function. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/microchip_t1.c')
-rw-r--r--drivers/net/phy/microchip_t1.c14
1 files changed, 2 insertions, 12 deletions
diff --git a/drivers/net/phy/microchip_t1.c b/drivers/net/phy/microchip_t1.c
index bc50224d43dd..c6a8c22efcce 100644
--- a/drivers/net/phy/microchip_t1.c
+++ b/drivers/net/phy/microchip_t1.c
@@ -197,20 +197,10 @@ static int lan87xx_phy_init(struct phy_device *phydev)
if (rc < 0)
return rc;
- /* Soft Reset the SMI block */
- rc = access_ereg_modify_changed(phydev, PHYACC_ATTR_BANK_SMI,
- 0x00, 0x8000, 0x8000);
- if (rc < 0)
- return rc;
-
- /* Check to see if the self-clearing bit is cleared */
- usleep_range(1000, 2000);
- rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
- PHYACC_ATTR_BANK_SMI, 0x00, 0);
+ /* phy Soft reset */
+ rc = genphy_soft_reset(phydev);
if (rc < 0)
return rc;
- if ((rc & 0x8000) != 0)
- return -ETIMEDOUT;
/* PHY Initialization */
for (i = 0; i < ARRAY_SIZE(init); i++) {