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authorRobert Marko <robert.marko@sartura.hr>2023-08-11 13:10:06 +0200
committerDavid S. Miller <davem@davemloft.net>2023-08-14 08:12:53 +0100
commitde875d35e0b07961657d41d0e1e05004fbb66664 (patch)
treeaffc793a37378705f7d0a434ca1ccb56aacfe201 /drivers/net/phy/phylink.c
parent2d93c30c4e1e3dfc2bd7208c6d3cb7cda339b2fb (diff)
dt-bindings: net: ethernet-controller: add PSGMII mode
Add a new PSGMII mode which is similar to QSGMII with the difference being that it combines 5 SGMII lines into a single link compared to 4 on QSGMII. It is commonly used by Qualcomm on their QCA807x PHY series. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/phylink.c')
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