diff options
author | Sujith Manoharan <c_manoha@qca.qualcomm.com> | 2012-01-10 09:54:10 +0530 |
---|---|---|
committer | Kalle Valo <kvalo@qca.qualcomm.com> | 2012-01-12 13:36:37 +0200 |
commit | 8232736dabd2a0310f76944fa7af0542fe3ded4f (patch) | |
tree | c7837b789f7e55ec1b00b0b8374362f0992727e2 /drivers/net/wireless/ath/ath6kl/cfg80211.c | |
parent | cbec267a5143f70ece4069d18889a442bcb3365b (diff) |
ath6kl: Fix listen interval handling
This patch addresses a few problems with the commit:
"ath6kl: Implement support for listen interval from userspace"
* The debugfs file required for reading/writing the listen interval
wasn't created. Fix this.
* The interface index was being hardcoded to zero. Fix this.
* Two separate parameters, "listen_interval_time and listen_interval_beacons"
were being used. This fails to work as expected because the FW assigns
higher precedence to "listen_interval_beacons" and "listen_interval_time"
ends up being never used at all.
To handle this, fix the host driver to exclusively use listen interval
based on units of beacon intervals.
To set the listen interval, a user would now do something like this:
echo "10" > /sys/kernel/debug/ieee80211/*/ath6kl/listen_interval
kvalo: fix two checkpatch warnings
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath6kl/cfg80211.c')
-rw-r--r-- | drivers/net/wireless/ath/ath6kl/cfg80211.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/net/wireless/ath/ath6kl/cfg80211.c b/drivers/net/wireless/ath/ath6kl/cfg80211.c index 9b26bbaf124e..1a98c9256c60 100644 --- a/drivers/net/wireless/ath/ath6kl/cfg80211.c +++ b/drivers/net/wireless/ath/ath6kl/cfg80211.c @@ -2725,8 +2725,7 @@ struct ath6kl *ath6kl_core_alloc(struct device *dev) clear_bit(SKIP_SCAN, &ar->flag); clear_bit(DESTROY_IN_PROGRESS, &ar->flag); - ar->listen_intvl_t = A_DEFAULT_LISTEN_INTERVAL; - ar->listen_intvl_b = 0; + ar->listen_intvl_b = A_DEFAULT_LISTEN_INTERVAL; ar->tx_pwr = 0; ar->intra_bss = 1; |