diff options
| author | Sujith <Sujith.Manoharan@atheros.com> | 2009-09-18 15:04:07 +0530 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2009-10-07 16:39:38 -0400 |
| commit | 193cd4585e6c5650875e98ccfef2fa93616fef30 (patch) | |
| tree | e6be7f8cc6cc0a988f1a9a4c4b118694b72acdda /drivers/net/wireless/ath/ath9k/phy.c | |
| parent | 0b98eaaa02965fb06dee4ad8c605bb3c93df2c98 (diff) | |
ath9k: Update INI release for AR9287
If the current channel is between 2412 and 2472 MHz and if the channel is
changing to 2484 MHz, then the registers 0xa1f4, 0xa1f8 and 0xa1fc need to be
programmed to the "japan_2484" values. Conversely, if the current channel
is 2484 MHz and if the channel is changing to one between 2412 and 2472 MHz, then
the three registers need to be programmed to the "normal" values.
This is needed for compliance with Japanese regulatory requirements.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/phy.c')
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/phy.c | 25 |
1 files changed, 18 insertions, 7 deletions
diff --git a/drivers/net/wireless/ath/ath9k/phy.c b/drivers/net/wireless/ath/ath9k/phy.c index eec4f1064a68..72a17c43a5a0 100644 --- a/drivers/net/wireless/ath/ath9k/phy.c +++ b/drivers/net/wireless/ath/ath9k/phy.c @@ -113,20 +113,31 @@ void ath9k_hw_ar9280_set_channel(struct ath_hw *ah, if (freq < 4800) { u32 txctl; + int regWrites = 0; bMode = 1; fracMode = 1; aModeRefSel = 0; channelSel = (freq * 0x10000) / 15; - txctl = REG_READ(ah, AR_PHY_CCK_TX_CTRL); - if (freq == 2484) { - - REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, - txctl | AR_PHY_CCK_TX_CTRL_JAPAN); + if (AR_SREV_9287_11_OR_LATER(ah)) { + if (freq == 2484) { + REG_WRITE_ARRAY(&ah->iniCckfirJapan2484, + 1, regWrites); + } else { + REG_WRITE_ARRAY(&ah->iniCckfirNormal, + 1, regWrites); + } } else { - REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, - txctl & ~AR_PHY_CCK_TX_CTRL_JAPAN); + txctl = REG_READ(ah, AR_PHY_CCK_TX_CTRL); + if (freq == 2484) { + /* Enable channel spreading for channel 14 */ + REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, + txctl | AR_PHY_CCK_TX_CTRL_JAPAN); + } else { + REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, + txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); + } } } else { bMode = 0; |