diff options
| author | Guo-Feng Fan <vincent_fann@realtek.com> | 2021-04-19 08:37:48 +0800 |
|---|---|---|
| committer | Kalle Valo <kvalo@codeaurora.org> | 2021-04-21 12:36:43 +0300 |
| commit | 3b25bac893534858a8cd0ff79afa929beb8e3b20 (patch) | |
| tree | faae041827687ab805b8628ccb64dc45f8bebc43 /drivers/net/wireless/realtek/rtw88/main.h | |
| parent | 056b239f867274b573f7da15c43ff8afb523e35c (diff) | |
rtw88: 8822c: debug: allow debugfs to enable/disable TXGAPK
Use "cat dm_cap" to show all features; where, prefix +/- means feature is
enabled/disabled:
$ cat dm_cap
DM capability 0x00000002
( 1) +TXGAPK
To control dm_cap:
use "echo +1 > dm_cap" to enable TXGAPK
use "echo -1 > dm_cap" to disable TXGAPK
Below is an example to disable TXGAPK.
$ echo -1 > dm_cap
$ cat dm_cap
DM capability 0x00000000
( 1) -TXGAPK
Below is an example to show TXGAPK status
$ echo 1 > dm_cap; cat dm_cap
( 1) +TXGAPK
path 0:
0x56 = 0x88c89
[TXGAPK] offset 1 0
[TXGAPK] offset 1 1
[TXGAPK] offset 1 2
[TXGAPK] offset 1 3
[TXGAPK] offset 0 4
[TXGAPK] offset 0 5
[TXGAPK] offset 0 6
[TXGAPK] offset 0 7
[TXGAPK] offset 0 8
[TXGAPK] offset 0 9
path 1:
0x56 = 0x89c89
[TXGAPK] offset 1 0
[TXGAPK] offset 1 1
[TXGAPK] offset 1 2
[TXGAPK] offset 1 3
[TXGAPK] offset 0 4
[TXGAPK] offset 0 5
[TXGAPK] offset 0 6
[TXGAPK] offset 0 7
[TXGAPK] offset 0 8
[TXGAPK] offset 0 9
Signed-off-by: Guo-Feng Fan <vincent_fann@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20210419003748.3224-4-pkshih@realtek.com
Diffstat (limited to 'drivers/net/wireless/realtek/rtw88/main.h')
| -rw-r--r-- | drivers/net/wireless/realtek/rtw88/main.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/net/wireless/realtek/rtw88/main.h b/drivers/net/wireless/realtek/rtw88/main.h index 1e14dc4ef012..dc3744847ba9 100644 --- a/drivers/net/wireless/realtek/rtw88/main.h +++ b/drivers/net/wireless/realtek/rtw88/main.h @@ -1516,6 +1516,7 @@ enum rtw_rf_band { struct rtw_gapk_info { u32 rf3f_bp[RF_BAND_MAX][RF_GAIN_NUM][RTW_RF_PATH_MAX]; + u32 rf3f_fs[RTW_RF_PATH_MAX][RF_GAIN_NUM]; bool txgapk_bp_done; s8 offset[RF_GAIN_NUM][RTW_RF_PATH_MAX]; s8 fianl_offset[RF_GAIN_NUM][RTW_RF_PATH_MAX]; @@ -1535,6 +1536,12 @@ struct rtw_cfo_track { #define RRSR_INIT_2G 0x15f #define RRSR_INIT_5G 0x150 +enum rtw_dm_cap { + RTW_DM_CAP_NA, + RTW_DM_CAP_TXGAPK, + RTW_DM_CAP_NUM +}; + struct rtw_dm_info { u32 cck_fa_cnt; u32 ofdm_fa_cnt; @@ -1603,6 +1610,7 @@ struct rtw_dm_info { struct ewma_evm ewma_evm[RTW_EVM_NUM]; struct ewma_snr ewma_snr[RTW_SNR_NUM]; + u32 dm_flags; /* enum rtw_dm_cap */ struct rtw_iqk_info iqk; struct rtw_gapk_info gapk; bool is_bt_iqk_timeout; |