diff options
| author | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2021-07-20 15:15:40 +0100 |
|---|---|---|
| committer | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2021-09-19 13:22:13 +0100 |
| commit | 382d7f7a824efb3db405f94c55769122622b887f (patch) | |
| tree | 036dfa5375edea5c708e6b4ec4fdba62976f6f77 /drivers/net | |
| parent | cb91cf67515d694cdbb3253f3a96121d40efe774 (diff) | |
net: phylink: add phylink_set_10g_modes() helper
Add a helper for setting 10Gigabit modes, so we have one central
place that sets all appropriate 10G modes for a driver.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/phy/phylink.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 3f24deea367d..3bf8865e9e82 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -132,6 +132,17 @@ void phylink_set_port_modes(unsigned long *mask) } EXPORT_SYMBOL_GPL(phylink_set_port_modes); +void phylink_set_10g_modes(unsigned long *mask) +{ + phylink_set(mask, 10000baseT_Full); + phylink_set(mask, 10000baseCR_Full); + phylink_set(mask, 10000baseSR_Full); + phylink_set(mask, 10000baseLR_Full); + phylink_set(mask, 10000baseLRM_Full); + phylink_set(mask, 10000baseER_Full); +} +EXPORT_SYMBOL_GPL(phylink_set_10g_modes); + static int phylink_is_empty_linkmode(const unsigned long *linkmode) { __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; |