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authorIra Weiny <ira.weiny@intel.com>2021-06-17 15:16:20 -0700
committerDan Williams <dan.j.williams@intel.com>2021-08-10 18:50:04 -0700
commitceeb0da0a0322bcba4c50ab3cf97fe9a7aa8a2e4 (patch)
tree63acdbbc03bcf7d37de09a74922de3d290ca2866 /drivers/nvdimm
parentf847502ad8e3299e7ad256aa0bd7eaf184646117 (diff)
cxl/mem: Adjust ram/pmem range to represent DPA ranges
CXL spec defines the volatile DPA range to be 0 to Volatile memory size. It further defines the persistent DPA range to follow directly after the end of the Volatile DPA through the persistent memory size. Essentially Volatile DPA range = [0, Volatile size) Persistent DPA range = [Volatile size, Volatile size + Persistent size) Adjust the pmem_range start to reflect this and remote the TODO. Signed-off-by: Ira Weiny <ira.weiny@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20210617221620.1904031-4-ira.weiny@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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