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author | Bjorn Helgaas <bhelgaas@google.com> | 2021-09-02 14:56:51 -0500 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2021-09-02 14:56:51 -0500 |
commit | 6e129176c3afd337966562fc3de236cc48447582 (patch) | |
tree | 013e7c401ed7176d33b4edc9323ad25ab22a47e6 /drivers/pci/controller/cadence/pcie-cadence.h | |
parent | eccefc748e0edbb3ae8be846c4cd17bc20397898 (diff) | |
parent | 0c84f5bf3eb324402a836f47b0958a19d6c47a68 (diff) |
Merge branch 'remotes/lorenzo/pci/endpoint'
- Add max-virtual-functions to endpoint binding (Kishon Vijay Abraham I)
- Add pci_epf_add_vepf() API to add virtual function to endpoint (Kishon
Vijay Abraham I)
- Add pci_epf_vepf_link() to link virtual function to endpoint physical
function (Kishon Vijay Abraham I)
- Add virtual function number to pci_epc_ops endpoint ops interfaces
(Kishon Vijay Abraham I)
- Simplify register base address computation for endpoint BAR configuration
(Kishon Vijay Abraham I)
- Add support to configure virtual functions in cadence endpoint driver
(Kishon Vijay Abraham I)
- Add SR-IOV configuration to endpoint test driver (Kishon Vijay Abraham I)
- Document configfs usage to create virtual functions for endpoints (Kishon
Vijay Abraham I)
* remotes/lorenzo/pci/endpoint:
Documentation: PCI: endpoint/pci-endpoint-cfs: Guide to use SR-IOV
misc: pci_endpoint_test: Populate sriov_configure ops to configure SR-IOV device
PCI: cadence: Add support to configure virtual functions
PCI: cadence: Simplify code to get register base address for configuring BAR
PCI: endpoint: Add virtual function number in pci_epc ops
PCI: endpoint: Add support to link a physical function to a virtual function
PCI: endpoint: Add support to add virtual function in endpoint core
dt-bindings: PCI: pci-ep: Add binding to specify virtual function
Diffstat (limited to 'drivers/pci/controller/cadence/pcie-cadence.h')
-rw-r--r-- | drivers/pci/controller/cadence/pcie-cadence.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/pci/controller/cadence/pcie-cadence.h b/drivers/pci/controller/cadence/pcie-cadence.h index 4bde99b74135..262421e5d917 100644 --- a/drivers/pci/controller/cadence/pcie-cadence.h +++ b/drivers/pci/controller/cadence/pcie-cadence.h @@ -8,6 +8,7 @@ #include <linux/kernel.h> #include <linux/pci.h> +#include <linux/pci-epf.h> #include <linux/phy/phy.h> /* Parameters for the waiting for link up routine */ @@ -46,10 +47,18 @@ #define CDNS_PCIE_LM_EP_ID_BUS_SHIFT 8 /* Endpoint Function f BAR b Configuration Registers */ +#define CDNS_PCIE_LM_EP_FUNC_BAR_CFG(bar, fn) \ + (((bar) < BAR_4) ? CDNS_PCIE_LM_EP_FUNC_BAR_CFG0(fn) : CDNS_PCIE_LM_EP_FUNC_BAR_CFG1(fn)) #define CDNS_PCIE_LM_EP_FUNC_BAR_CFG0(fn) \ (CDNS_PCIE_LM_BASE + 0x0240 + (fn) * 0x0008) #define CDNS_PCIE_LM_EP_FUNC_BAR_CFG1(fn) \ (CDNS_PCIE_LM_BASE + 0x0244 + (fn) * 0x0008) +#define CDNS_PCIE_LM_EP_VFUNC_BAR_CFG(bar, fn) \ + (((bar) < BAR_4) ? CDNS_PCIE_LM_EP_VFUNC_BAR_CFG0(fn) : CDNS_PCIE_LM_EP_VFUNC_BAR_CFG1(fn)) +#define CDNS_PCIE_LM_EP_VFUNC_BAR_CFG0(fn) \ + (CDNS_PCIE_LM_BASE + 0x0280 + (fn) * 0x0008) +#define CDNS_PCIE_LM_EP_VFUNC_BAR_CFG1(fn) \ + (CDNS_PCIE_LM_BASE + 0x0284 + (fn) * 0x0008) #define CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_APERTURE_MASK(b) \ (GENMASK(4, 0) << ((b) * 8)) #define CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_APERTURE(b, a) \ @@ -114,6 +123,7 @@ #define CDNS_PCIE_EP_FUNC_MSI_CAP_OFFSET 0x90 #define CDNS_PCIE_EP_FUNC_MSIX_CAP_OFFSET 0xb0 +#define CDNS_PCIE_EP_FUNC_SRIOV_CAP_OFFSET 0x200 /* * Root Port Registers (PCI configuration space for the root port function) @@ -318,9 +328,11 @@ struct cdns_pcie_rc { /** * struct cdns_pcie_epf - Structure to hold info about endpoint function + * @epf: Info about virtual functions attached to the physical function * @epf_bar: reference to the pci_epf_bar for the six Base Address Registers */ struct cdns_pcie_epf { + struct cdns_pcie_epf *epf; struct pci_epf_bar *epf_bar[PCI_STD_NUM_BARS]; }; |