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authorHou Zhiqiang <Zhiqiang.Hou@nxp.com>2020-02-13 12:06:39 +0800
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2020-02-21 11:53:22 +0000
commit029dea3cdc67690736e35b78c9d8ed6da1c9ec98 (patch)
tree4951c8d72786bd071f0794a7979b24d76badad9b /drivers/pci/controller/mobiveil
parent52cae4c7082f5f479f1692ba3f5ee6292d0aa4f9 (diff)
PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors
There are some 8-bit and 16-bit registers in PCIe configuration space, so add these accessors accordingly. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com> Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in> Reviewed-by: Andrew Murray <amurray@thegoodpenguin.co.uk>
Diffstat (limited to 'drivers/pci/controller/mobiveil')
-rw-r--r--drivers/pci/controller/mobiveil/pcie-mobiveil.h23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
index f395fa661a1c..ac76cf5d1007 100644
--- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h
+++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
@@ -182,10 +182,33 @@ static inline u32 mobiveil_csr_readl(struct mobiveil_pcie *pcie, u32 off)
return mobiveil_csr_read(pcie, off, 0x4);
}
+static inline u16 mobiveil_csr_readw(struct mobiveil_pcie *pcie, u32 off)
+{
+ return mobiveil_csr_read(pcie, off, 0x2);
+}
+
+static inline u8 mobiveil_csr_readb(struct mobiveil_pcie *pcie, u32 off)
+{
+ return mobiveil_csr_read(pcie, off, 0x1);
+}
+
+
static inline void mobiveil_csr_writel(struct mobiveil_pcie *pcie, u32 val,
u32 off)
{
mobiveil_csr_write(pcie, val, off, 0x4);
}
+static inline void mobiveil_csr_writew(struct mobiveil_pcie *pcie, u16 val,
+ u32 off)
+{
+ mobiveil_csr_write(pcie, val, off, 0x2);
+}
+
+static inline void mobiveil_csr_writeb(struct mobiveil_pcie *pcie, u8 val,
+ u32 off)
+{
+ mobiveil_csr_write(pcie, val, off, 0x1);
+}
+
#endif /* _PCIE_MOBIVEIL_H */