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authorRussell King <rmk+kernel@arm.linux.org.uk>2016-11-29 10:13:48 +0000
committerRussell King (Oracle) <rmk+kernel@armlinux.org.uk>2024-04-16 16:52:38 +0100
commit5132b1c51c7e71e90cfa5fce955445b2392f0f05 (patch)
treef6c39e07ee59efee8e89a3031cebd033a96ccb1f /drivers/pci/controller/pci-mvebu.c
parent06709d533d5e0cfae8ddffda0f56186fd46eb560 (diff)
implement slot capabilities (SSPL)
Diffstat (limited to 'drivers/pci/controller/pci-mvebu.c')
-rw-r--r--drivers/pci/controller/pci-mvebu.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index 17ac7a03d680..309956dff9a6 100644
--- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c
@@ -79,6 +79,7 @@
#define PCIE_SSPL_VALUE_MASK GENMASK(7, 0)
#define PCIE_SSPL_SCALE_SHIFT 8
#define PCIE_SSPL_SCALE_MASK GENMASK(9, 8)
+#define PCIE_SSPL_MSGEN BIT(14)
#define PCIE_SSPL_ENABLE BIT(16)
#define PCIE_RC_RTSTA 0x1a14
#define PCIE_DEBUG_CTRL 0x1a60
@@ -705,6 +706,14 @@ mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
(PCI_EXP_LNKSTA_DLLLA << 16) : 0);
break;
+ case PCI_EXP_SLTCAP:
+ {
+ u32 tmp = mvebu_readl(port, PCIE_SSPL_OFF);
+ *value = FIELD_GET(PCIE_SSPL_SCALE_MASK, tmp) << 15 |
+ FIELD_GET(PCIE_SSPL_VALUE_MASK, tmp) << 7;
+ break;
+ }
+
case PCI_EXP_SLTCTL: {
u16 slotctl = le16_to_cpu(bridge->pcie_conf.slotctl);
u16 slotsta = le16_to_cpu(bridge->pcie_conf.slotsta);
@@ -882,6 +891,17 @@ mvebu_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
mvebu_writel(port, new, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
break;
+ case PCI_EXP_SLTCAP:
+ {
+ u32 sspl = FIELD_PREP(PCIE_SSPL_VALUE_MASK,
+ FIELD_GET(PCI_EXP_SLTCAP_SPLV, new)) |
+ FIELD_PREP(PCIE_SSPL_SCALE_MASK,
+ FIELD_GET(PCI_EXP_SLTCAP_SPLS, new)) |
+ PCIE_SSPL_MSGEN;
+ mvebu_writel(port, sspl, PCIE_SSPL_OFF);
+ break;
+ }
+
case PCI_EXP_SLTCTL:
/*
* Allow to change PCIE_SSPL_ENABLE bit only when slot power