diff options
| author | Pali Rohár <pali@kernel.org> | 2022-01-04 16:35:28 +0100 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2022-02-03 10:54:06 +0000 |
| commit | c94ea32c0d3db6ce7ca4fe771051b5f8818b77f0 (patch) | |
| tree | b8a3589a093982e280b901b9f5f562a3d9fb2523 /drivers/pci/controller/pci-mvebu.c | |
| parent | d76a6ed0964af14327068408da095a2355a5b8dc (diff) | |
PCI: mvebu: Update comment for PCI_EXP_LNKCTL register on emulated bridge
Logic and code for clearing PCI_EXP_LNKCTL_CLKREQ_EN bit is correct, but
comment describing it is misleading. PCI_EXP_LNKCTL_CLKREQ_EN bit should be
hardwired to zero but mvebu hw allows to change it.
Link: https://lore.kernel.org/r/20220104153529.31647-11-pali@kernel.org
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'drivers/pci/controller/pci-mvebu.c')
| -rw-r--r-- | drivers/pci/controller/pci-mvebu.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index 216da126a06d..48098deb9b7b 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -663,10 +663,9 @@ mvebu_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge, case PCI_EXP_LNKCTL: /* - * If we don't support CLKREQ, we must ensure that the - * CLKREQ enable bit always reads zero. Since we haven't - * had this capability, and it's dependent on board wiring, - * disable it for the time being. + * PCIe requires that the Enable Clock Power Management bit + * is hard-wired to zero for downstream ports but HW allows + * to change it. */ new &= ~PCI_EXP_LNKCTL_CLKREQ_EN; |