diff options
| author | Kishon Vijay Abraham I <kishon@ti.com> | 2017-03-27 15:15:08 +0530 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-04-28 10:23:17 -0500 |
| commit | 608793e27b3313b2385af557c95d8e4207126670 (patch) | |
| tree | d53551086226816d15d3bf855fd39f8fc28144de /drivers/pci/dwc/pcie-designware.h | |
| parent | 5ffd90a035a273068a8bbef74a01ae923b80110b (diff) | |
PCI: dwc: dra7xx: Add EP mode support
The PCIe controller integrated in dra7xx SoCs is capable of operating in
endpoint mode. Add endpoint mode support to dra7xx driver.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/dwc/pcie-designware.h')
| -rw-r--r-- | drivers/pci/dwc/pcie-designware.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/pci/dwc/pcie-designware.h b/drivers/pci/dwc/pcie-designware.h index 3cafba40abbc..c6a840575796 100644 --- a/drivers/pci/dwc/pcie-designware.h +++ b/drivers/pci/dwc/pcie-designware.h @@ -120,6 +120,13 @@ enum dw_pcie_region_type { DW_PCIE_REGION_OUTBOUND, }; +enum dw_pcie_device_mode { + DW_PCIE_UNKNOWN_TYPE, + DW_PCIE_EP_TYPE, + DW_PCIE_LEG_EP_TYPE, + DW_PCIE_RC_TYPE, +}; + struct dw_pcie_host_ops { int (*rd_own_conf)(struct pcie_port *pp, int where, int size, u32 *val); int (*wr_own_conf)(struct pcie_port *pp, int where, int size, u32 val); |