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authorBjorn Helgaas <bhelgaas@google.com>2020-12-15 15:11:10 -0600
committerBjorn Helgaas <bhelgaas@google.com>2020-12-15 15:11:10 -0600
commit7546ad5e3c20d93e15ad38916a7661846e9c247d (patch)
tree5cb86a13c257299df8084c79e1b876416d568aae /drivers/pci
parent7c250f8293a362189419ae8b34da111ba02af304 (diff)
parent1d1cd163d0de22a4041a6f1aeabcf78f80076539 (diff)
Merge branch 'remotes/lorenzo/pci/aardvark'
- Update comment about delay before link training (Pali Rohár) * remotes/lorenzo/pci/aardvark: PCI: aardvark: Update comment about disabling link training
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/controller/pci-aardvark.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index 1043e54c73bd..051b48bd7985 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -252,7 +252,14 @@ static void advk_pcie_issue_perst(struct advk_pcie *pcie)
if (!pcie->reset_gpio)
return;
- /* PERST does not work for some cards when link training is enabled */
+ /*
+ * As required by PCI Express spec (PCI Express Base Specification, REV.
+ * 4.0 PCI Express, February 19 2014, 6.6.1 Conventional Reset) a delay
+ * for at least 100ms after de-asserting PERST# signal is needed before
+ * link training is enabled. So ensure that link training is disabled
+ * prior de-asserting PERST# signal to fulfill that PCI Express spec
+ * requirement.
+ */
reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
reg &= ~LINK_TRAINING_EN;
advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);