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authorDamien Le Moal <dlemoal@kernel.org>2023-11-22 15:04:04 +0900
committerLorenzo Pieralisi <lpieralisi@kernel.org>2023-12-19 09:36:42 +0100
commit5815c2d17a74927c627f5c759bd9d772ac4c3981 (patch)
tree695947ea85e4c911395636f000ef6d362efcba19 /drivers/pci
parentc0dcdeea085053f3f25ee0ad262aa0aaa86df82b (diff)
PCI: rockchip-ep: Use INTX instead of legacy
Rename the function rockchip_pcie_ep_send_legacy_irq() of the rockchip endpoint driver to rockchip_pcie_ep_send_intx_irq(). Uses of the term "legacy" are also replaced with "INTX" in comments. Link: https://lore.kernel.org/r/20231122060406.14695-15-dlemoal@kernel.org Signed-off-by: Damien Le Moal <dlemoal@kernel.org> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Reviewed-by: Christoph Hellwig <hch@lst.de>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/controller/pcie-rockchip-ep.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
index 95b1c8ef59c3..c9046e97a1d2 100644
--- a/drivers/pci/controller/pcie-rockchip-ep.c
+++ b/drivers/pci/controller/pcie-rockchip-ep.c
@@ -26,16 +26,16 @@
* @max_regions: maximum number of regions supported by hardware
* @ob_region_map: bitmask of mapped outbound regions
* @ob_addr: base addresses in the AXI bus where the outbound regions start
- * @irq_phys_addr: base address on the AXI bus where the MSI/legacy IRQ
+ * @irq_phys_addr: base address on the AXI bus where the MSI/INTX IRQ
* dedicated outbound regions is mapped.
* @irq_cpu_addr: base address in the CPU space where a write access triggers
- * the sending of a memory write (MSI) / normal message (legacy
+ * the sending of a memory write (MSI) / normal message (INTX
* IRQ) TLP through the PCIe bus.
- * @irq_pci_addr: used to save the current mapping of the MSI/legacy IRQ
+ * @irq_pci_addr: used to save the current mapping of the MSI/INTX IRQ
* dedicated outbound region.
* @irq_pci_fn: the latest PCI function that has updated the mapping of
- * the MSI/legacy IRQ dedicated outbound region.
- * @irq_pending: bitmask of asserted legacy IRQs.
+ * the MSI/INTX IRQ dedicated outbound region.
+ * @irq_pending: bitmask of asserted INTX IRQs.
*/
struct rockchip_pcie_ep {
struct rockchip_pcie rockchip;
@@ -325,8 +325,8 @@ static void rockchip_pcie_ep_assert_intx(struct rockchip_pcie_ep *ep, u8 fn,
}
}
-static int rockchip_pcie_ep_send_legacy_irq(struct rockchip_pcie_ep *ep, u8 fn,
- u8 intx)
+static int rockchip_pcie_ep_send_intx_irq(struct rockchip_pcie_ep *ep, u8 fn,
+ u8 intx)
{
u16 cmd;
@@ -413,7 +413,7 @@ static int rockchip_pcie_ep_raise_irq(struct pci_epc *epc, u8 fn, u8 vfn,
switch (type) {
case PCI_IRQ_INTX:
- return rockchip_pcie_ep_send_legacy_irq(ep, fn, 0);
+ return rockchip_pcie_ep_send_intx_irq(ep, fn, 0);
case PCI_IRQ_MSI:
return rockchip_pcie_ep_send_msi_irq(ep, fn, interrupt_num);
default: