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authorKrzysztof Kozlowski <krzk@kernel.org>2020-01-03 17:47:09 +0100
committerKishon Vijay Abraham I <kishon@ti.com>2020-01-14 10:50:19 +0530
commit4cb6eea22621e14e29c91d18d5c66f0b01470071 (patch)
tree62e174d3530e5f217c746cf283cbba51e50785e5 /drivers/phy/mediatek
parent9227942383307f97fa6992416f73af4a23ef972c (diff)
phy: mediatek: Fix Kconfig indentation
Adjust indentation from spaces to tab (+optional two spaces) as in coding style. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/phy/mediatek')
-rw-r--r--drivers/phy/mediatek/Kconfig20
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/phy/mediatek/Kconfig b/drivers/phy/mediatek/Kconfig
index 376f5d189da0..7d19134c6b7c 100644
--- a/drivers/phy/mediatek/Kconfig
+++ b/drivers/phy/mediatek/Kconfig
@@ -3,12 +3,12 @@
# Phy drivers for Mediatek devices
#
config PHY_MTK_TPHY
- tristate "MediaTek T-PHY Driver"
- depends on ARCH_MEDIATEK && OF
- select GENERIC_PHY
- help
- Say 'Y' here to add support for MediaTek T-PHY driver,
- it supports multiple usb2.0, usb3.0 ports, PCIe and
+ tristate "MediaTek T-PHY Driver"
+ depends on ARCH_MEDIATEK && OF
+ select GENERIC_PHY
+ help
+ Say 'Y' here to add support for MediaTek T-PHY driver,
+ it supports multiple usb2.0, usb3.0 ports, PCIe and
SATA, and meanwhile supports two version T-PHY which have
different banks layout, the T-PHY with shared banks between
multi-ports is first version, otherwise is second veriosn,
@@ -25,10 +25,10 @@ config PHY_MTK_UFS
specified M-PHYs.
config PHY_MTK_XSPHY
- tristate "MediaTek XS-PHY Driver"
- depends on ARCH_MEDIATEK && OF
- select GENERIC_PHY
- help
+ tristate "MediaTek XS-PHY Driver"
+ depends on ARCH_MEDIATEK && OF
+ select GENERIC_PHY
+ help
Enable this to support the SuperSpeedPlus XS-PHY transceiver for
USB3.1 GEN2 controllers on MediaTek chips. The driver supports
multiple USB2.0, USB3.1 GEN2 ports.