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authorHaibo Chen <haibo.chen@nxp.com>2020-05-26 18:22:02 +0800
committerUlf Hansson <ulf.hansson@linaro.org>2020-05-29 12:38:00 +0200
commit16e40e5b1e3c6646fd90d0c3186703d209216f03 (patch)
tree7e0ae50ca2c7e2f6264a128373163a73cfea608d /drivers/phy
parent1194be8c949b8190b2882ad8335a5d98aa50c735 (diff)
mmc: sdhci-esdhc-imx: disable the CMD CRC check for standard tuning
In current code, we add 1ms dealy after each tuning command for standard tuning method. Adding this 1ms dealy is because USDHC default check the CMD CRC and DATA line. If detect the CMD CRC, USDHC standard tuning IC logic do not wait for the tuning data sending out by the card, trigger the buffer read ready interrupt immediately, and step to next cycle. So when next time the new tuning command send out by USDHC, card may still not send out the tuning data of the upper command,then some eMMC cards may stuck, can't response to any command, block the whole tuning procedure. If do not check the CMD CRC for tuning, then do not has this issue. USDHC will wait for the tuning data of each tuning command and check them. If the tuning data pass the check, it also means the CMD line also okay for tuning. So this patch disable the CMD CRC check for tuning, save some time for the whole tuning procedure. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Link: https://lore.kernel.org/r/1590488522-9292-2-git-send-email-haibo.chen@nxp.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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