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authorQipeng Zha <qipeng.zha@intel.com>2015-11-26 01:09:51 +0800
committerLinus Walleij <linus.walleij@linaro.org>2015-12-10 23:01:41 +0100
commit618a919b4c5150408c26f8b4527851f7065f841c (patch)
tree7b958a9ea7d915bb481e2ee9e3d2709de899c59a /drivers/pinctrl/intel/pinctrl-sunrisepoint.c
parent46435d4c35336e169a198ef5cd51f9427e78ed62 (diff)
pinctrl: intel: fix bug of register offset calculation
The group size for registers PADCFGLOCK, HOSTSW_OWN, GPI_IS, GPI_IE, are not 24 for Broxton, Add a parameter to allow different platform to set correct value. Signed-off-by: Qi Zheng <qi.zheng@intel.com> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/intel/pinctrl-sunrisepoint.c')
-rw-r--r--drivers/pinctrl/intel/pinctrl-sunrisepoint.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-sunrisepoint.c b/drivers/pinctrl/intel/pinctrl-sunrisepoint.c
index 1de9ae5010db..c725a5313b4e 100644
--- a/drivers/pinctrl/intel/pinctrl-sunrisepoint.c
+++ b/drivers/pinctrl/intel/pinctrl-sunrisepoint.c
@@ -30,6 +30,7 @@
.padcfglock_offset = SPT_PADCFGLOCK, \
.hostown_offset = SPT_HOSTSW_OWN, \
.ie_offset = SPT_GPI_IE, \
+ .gpp_size = 24, \
.pin_base = (s), \
.npins = ((e) - (s) + 1), \
}