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authorTomer Maimon <tmaimon77@gmail.com>2018-11-07 15:44:34 +0200
committerLinus Walleij <linus.walleij@linaro.org>2018-11-15 11:14:46 +0100
commit67b249aaa650a461c86484e6c365f33887f0968a (patch)
tree14b03db3c0e543427ba17af23d1732a883d3bb03 /drivers/pinctrl/nuvoton
parentf969b7aac980a26d3b5d126947989d4b072f27b4 (diff)
pinctrl: nuvoton: modify NPCM7xx pin configuration function
Modify GPIO direction setting in pin configuration function by using generic GPIO functions to set the GPIO direction instead of direct access to the GPIO direction register. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Tested-by: Kun Yi <kunyi@google.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/nuvoton')
-rw-r--r--drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c13
1 files changed, 3 insertions, 10 deletions
diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
index 7ad50d9268aa..b455209382a5 100644
--- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
+++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
@@ -1799,19 +1799,12 @@ static int npcm7xx_config_set_one(struct npcm7xx_pinctrl *npcm,
npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_PU, gpio);
break;
case PIN_CONFIG_INPUT_ENABLE:
- if (arg) {
- iowrite32(gpio, bank->base + NPCM7XX_GP_N_OEC);
- npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_IEM,
- gpio);
- } else
- npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_IEM,
- gpio);
+ iowrite32(gpio, bank->base + NPCM7XX_GP_N_OEC);
+ bank->direction_input(&bank->gc, pin % bank->gc.ngpio);
break;
case PIN_CONFIG_OUTPUT:
- npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_IEM, gpio);
- iowrite32(gpio, arg ? bank->base + NPCM7XX_GP_N_DOS :
- bank->base + NPCM7XX_GP_N_DOC);
iowrite32(gpio, bank->base + NPCM7XX_GP_N_OES);
+ bank->direction_output(&bank->gc, pin % bank->gc.ngpio, arg);
break;
case PIN_CONFIG_DRIVE_PUSH_PULL:
npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_OTYP, gpio);