diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2021-08-30 14:38:37 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2021-08-30 14:38:37 -0700 |
| commit | 7d6e3fa87e732ec1e7761bf325c0907685c8571b (patch) | |
| tree | ff5c3983e6e8ebf277a95dfa41d63ad3fef65db0 /drivers/pinctrl/pinctrl-amd.c | |
| parent | e5e726f7bb9f711102edea7e5bd511835640e3b4 (diff) | |
| parent | 47fb0cfdb7a71a8a0ff8fe1d117363dc81f6ca77 (diff) | |
Merge tag 'irq-core-2021-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner:
"Updates to the interrupt core and driver subsystems:
Core changes:
- The usual set of small fixes and improvements all over the place,
but nothing stands out
MSI changes:
- Further consolidation of the PCI/MSI interrupt chip code
- Make MSI sysfs code independent of PCI/MSI and expose the MSI
interrupts of platform devices in the same way as PCI exposes them.
Driver changes:
- Support for ARM GICv3 EPPI partitions
- Treewide conversion to generic_handle_domain_irq() for all chained
interrupt controllers
- Conversion to bitmap_zalloc() throughout the irq chip drivers
- The usual set of small fixes and improvements"
* tag 'irq-core-2021-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (57 commits)
platform-msi: Add ABI to show msi_irqs of platform devices
genirq/msi: Move MSI sysfs handling from PCI to MSI core
genirq/cpuhotplug: Demote debug printk to KERN_DEBUG
irqchip/qcom-pdc: Trim unused levels of the interrupt hierarchy
irqdomain: Export irq_domain_disconnect_hierarchy()
irqchip/gic-v3: Fix priority comparison when non-secure priorities are used
irqchip/apple-aic: Fix irq_disable from within irq handlers
pinctrl/rockchip: drop the gpio related codes
gpio/rockchip: drop irq_gc_lock/irq_gc_unlock for irq set type
gpio/rockchip: support next version gpio controller
gpio/rockchip: use struct rockchip_gpio_regs for gpio controller
gpio/rockchip: add driver for rockchip gpio
dt-bindings: gpio: change items restriction of clock for rockchip,gpio-bank
pinctrl/rockchip: add pinctrl device to gpio bank struct
pinctrl/rockchip: separate struct rockchip_pin_bank to a head file
pinctrl/rockchip: always enable clock for gpio controller
genirq: Fix kernel doc indentation
EDAC/altera: Convert to generic_handle_domain_irq()
powerpc: Bulk conversion to generic_handle_domain_irq()
nios2: Bulk conversion to generic_handle_domain_irq()
...
Diffstat (limited to 'drivers/pinctrl/pinctrl-amd.c')
| -rw-r--r-- | drivers/pinctrl/pinctrl-amd.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c index 5b764740b829..c001f2ed20f8 100644 --- a/drivers/pinctrl/pinctrl-amd.c +++ b/drivers/pinctrl/pinctrl-amd.c @@ -620,14 +620,12 @@ static irqreturn_t amd_gpio_irq_handler(int irq, void *dev_id) if (!(regval & PIN_IRQ_PENDING) || !(regval & BIT(INTERRUPT_MASK_OFF))) continue; - irq = irq_find_mapping(gc->irq.domain, irqnr + i); - if (irq != 0) - generic_handle_irq(irq); + generic_handle_domain_irq(gc->irq.domain, irqnr + i); /* Clear interrupt. * We must read the pin register again, in case the * value was changed while executing - * generic_handle_irq() above. + * generic_handle_domain_irq() above. * If we didn't find a mapping for the interrupt, * disable it in order to avoid a system hang caused * by an interrupt storm. |