diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-06-30 16:50:43 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-07-13 09:43:34 +0200 |
| commit | e9d66bdbc5abecaf705bf5a2f4f6279b9e313b0c (patch) | |
| tree | dd9bc23170b2d3ce6fb4be8195cf99b6d19548b0 /drivers/pinctrl/renesas/pinctrl.c | |
| parent | 7ebaa41047738d46fca6376b3f1765ef69c463c5 (diff) | |
pinctrl: renesas: r8a77995: Add bias pinconf support
Implement support for pull-up (most pins, excl. DU_DOTCLKIN0) and
pull-down (most pins, excl. JTAG) handling for the R-Car D3 SoC, using
some parts from the common R-Car bias handling, which requires making
rcar_pin_to_bias_reg() public.
R-Car D3 needs special handling for the NFRE# (GP_3_0) and NFWE#
(GP_3_1) pins. Unlike all other pins, they are controlled by different
bits in the LSI pin pull-up/down control register (PUD2) than in the LSI
pin pull-enable register (PUEN2).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/04aad2b0bf82a32fb08e5e21e4ac1fb03452724f.1625064076.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/pinctrl/renesas/pinctrl.c')
| -rw-r--r-- | drivers/pinctrl/renesas/pinctrl.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/renesas/pinctrl.c b/drivers/pinctrl/renesas/pinctrl.c index 85cb78cfcfa6..f3eecb20c086 100644 --- a/drivers/pinctrl/renesas/pinctrl.c +++ b/drivers/pinctrl/renesas/pinctrl.c @@ -841,7 +841,7 @@ int sh_pfc_register_pinctrl(struct sh_pfc *pfc) return pinctrl_enable(pmx->pctl); } -static const struct pinmux_bias_reg * +const struct pinmux_bias_reg * rcar_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin, unsigned int *bit) { |