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author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2016-10-24 20:40:09 +0900 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-10-11 11:34:00 +0200 |
commit | b014912f6c462223229bb9865ceb1a363984c521 (patch) | |
tree | b47e07440b1f528beea5c73c0e6a665d3e272b0c /drivers/pinctrl/sh-pfc/pfc-r8a7795.c | |
parent | 8480e6ca800046d14bfc610a24f2317341250b04 (diff) |
pinctrl: sh-pfc: r8a7796: Add support for INTC-EX IRQ pins
Most pins on the r8a7796 SoC can be configured in GPIO mode for
interrupt and GPIO functionality, while a couple of them can also
be routed to the INTC-EX hardware block (formerly known as IRQC).
On r8a7795 the INTC-EX hardware handles pins IRQ0 -> IRQ5 and
this patch adds support for them to the PFC driver as "intc_ex_irqN".
[takeshi.kihara.df: Ported from commit bb46f6f3f3bf ("pinctrl: sh-pfc:
r8a7795: Add support for INTC-EX IRQ pins")
to drivers/pinctrl/sh-pfc/pfc-r8a7796.c]
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a7795.c')
0 files changed, 0 insertions, 0 deletions