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| author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2017-11-16 23:59:21 +0900 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-12-05 14:14:55 +0100 |
| commit | 0f4713d71f22d3b0ec3de6ae4a126cceecdea82b (patch) | |
| tree | 6c0b8f754e9a940d789d58f7be20670eb5f9a799 /drivers/pinctrl/sh-pfc/pfc-r8a77995.c | |
| parent | 8714a9c1bdd388aa6cff6cd01e357c349300158e (diff) | |
pinctrl: sh-pfc: r8a7796: Rename RTS{0,1,3,4}# pin function definitions
This patch renames the pin function macro definitions of the GPSR5 and
IPSR{0,3,5,6,12} registers value for the RTS{0,1,3,4}# pin.
This is a correction because GPSR and IPSR register specification for
R8A7796 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.54E.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a77995.c')
0 files changed, 0 insertions, 0 deletions