diff options
| author | Thierry Reding <treding@nvidia.com> | 2019-06-21 17:19:32 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2019-06-25 15:35:58 +0200 |
| commit | cf75b8f2cd8f1f9beb64c2fa2eb93a7c265b59c1 (patch) | |
| tree | 51b11e4427e8b18a0b826a9f339286710f923e2f /drivers/pinctrl/tegra/pinctrl-tegra.h | |
| parent | 55bd054ce434bb4aad80f6b787d69d29342bd4a8 (diff) | |
pinctrl: tegra: Add bitmask support for parked bits
Some pin groups have park bits for multiple pins in one register.
Support this by turning the parked bit field into a parked bitmask
field. If no parked bits are supported, the bitmask can be 0.
Update the pingroup table on Tegra210, which is the only generation
where this is supported, with the parked bitmask.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/tegra/pinctrl-tegra.h')
| -rw-r--r-- | drivers/pinctrl/tegra/pinctrl-tegra.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.h b/drivers/pinctrl/tegra/pinctrl-tegra.h index 82cd947e5171..719bdcba269e 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra.h +++ b/drivers/pinctrl/tegra/pinctrl-tegra.h @@ -104,7 +104,6 @@ struct tegra_function { * @tri_reg: Tri-state register offset. * @tri_bank: Tri-state register bank. * @tri_bit: Tri-state register bit. - * @parked_bit: Parked register bit. -1 if unsupported. * @einput_bit: Enable-input register bit. * @odrain_bit: Open-drain register bit. * @lock_bit: Lock register bit. @@ -126,6 +125,7 @@ struct tegra_function { * @slwf_bit: Slew Falling register bit. * @slwf_width: Slew Falling field width. * @drvtype_bit: Drive type register bit. + * @parked_bitmask: Parked register mask. 0 if unsupported. * * -1 in a *_reg field means that feature is unsupported for this group. * *_bank and *_reg values are irrelevant when *_reg is -1. @@ -154,7 +154,6 @@ struct tegra_pingroup { s32 mux_bit:6; s32 pupd_bit:6; s32 tri_bit:6; - s32 parked_bit:6; s32 einput_bit:6; s32 odrain_bit:6; s32 lock_bit:6; @@ -172,6 +171,7 @@ struct tegra_pingroup { s32 drvup_width:6; s32 slwr_width:6; s32 slwf_width:6; + u32 parked_bitmask; }; /** |