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authorRhyland Klein <rklein@nvidia.com>2016-04-07 17:37:08 -0400
committerLinus Walleij <linus.walleij@linaro.org>2016-04-14 14:01:25 +0200
commit26e6aaafc8a1e862437003d6e06ba748e7177ea8 (patch)
tree04ff0595a8c41c7a2dfa54a5bd59212cc0a9b4e6 /drivers/pinctrl/tegra/pinctrl-tegra124.c
parent6ba20a00a36bb47c64581bfa08f1606d4bf0589f (diff)
pinctrl: tegra: clear park bit for all pins
Parking bits might not be cleared by the bootloader properly (if for instance it doesn't use the device configured by that pin). Clear the park bits for all the pins during pinctrl probe. This is present on T210 platforms but not earlier ones, so for earlier generations, set parked_reg = -1 to disable. The park bit is used to prevent glitching when reprogramming pinctrl registers. Based on work by: Shravani Dingari <shravanid@nvidia.com> Signed-off-by: Rhyland Klein <rklein@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/tegra/pinctrl-tegra124.c')
-rw-r--r--drivers/pinctrl/tegra/pinctrl-tegra124.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra124.c b/drivers/pinctrl/tegra/pinctrl-tegra124.c
index 7cd44c7c296d..199d301f7c3e 100644
--- a/drivers/pinctrl/tegra/pinctrl-tegra124.c
+++ b/drivers/pinctrl/tegra/pinctrl-tegra124.c
@@ -1747,6 +1747,7 @@ static struct tegra_function tegra124_functions[] = {
.lock_bit = 7, \
.ioreset_bit = PINGROUP_BIT_##ior(8), \
.rcv_sel_bit = PINGROUP_BIT_##rcv_sel(9), \
+ .parked_reg = -1, \
.drv_reg = -1, \
}
@@ -1767,6 +1768,7 @@ static struct tegra_function tegra124_functions[] = {
.rcv_sel_bit = -1, \
.drv_reg = DRV_PINGROUP_REG(r), \
.drv_bank = 0, \
+ .parked_reg = -1, \
.hsm_bit = hsm_b, \
.schmitt_bit = schmitt_b, \
.lpmd_bit = lpmd_b, \