diff options
| author | Thierry Reding <treding@nvidia.com> | 2020-03-19 13:27:37 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2020-03-27 11:46:06 +0100 |
| commit | 368b62f2fd077d4c7db09461e8e24f07491a513d (patch) | |
| tree | f41a2b2b9bd20bbbf2eb9d8149b06a8b4d3169d0 /drivers/pinctrl/tegra/pinctrl-tegra194.c | |
| parent | 103afc8e9e8c4eff96052b311d19f7c32b653ebb (diff) | |
pinctrl: tegra: Add SFIO/GPIO programming on Tegra194
Prior to Tegra186, the selection of SFIO vs. GPIO modes was done as part
of the GPIO controller's register programming. Starting with Tegra186, a
pin is configured as GPIO or SFIO with a bit in a configuration register
of the pin controller.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200319122737.3063291-10-thierry.reding@gmail.com
Tested-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/tegra/pinctrl-tegra194.c')
| -rw-r--r-- | drivers/pinctrl/tegra/pinctrl-tegra194.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra194.c b/drivers/pinctrl/tegra/pinctrl-tegra194.c index 61afe5fe9dec..2e0b5f7bb095 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra194.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra194.c @@ -95,6 +95,7 @@ static struct tegra_function tegra194_functions[] = { .tri_bit = 4, \ .einput_bit = e_input, \ .odrain_bit = e_od, \ + .sfsel_bit = 10, \ .schmitt_bit = schmitt_b, \ .drvtype_bit = 13, \ .drv_reg = -1, \ @@ -140,6 +141,7 @@ static const struct tegra_pinctrl_soc_data tegra194_pinctrl = { .hsm_in_mux = true, .schmitt_in_mux = true, .drvtype_in_mux = true, + .sfsel_in_mux = true, }; static int tegra194_pinctrl_probe(struct platform_device *pdev) |